Protocol Control Part Memory Contention Prevention

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Solution Overview

Problem

Existing industrial control systems face increased processing load and delayed data processing due to memory contention when multiple units access shared memory, leading to longer CPU cycles and inability to execute processing in constant cycles.

Innovation Solution

The system minimizes memory contention by using a protocol control part to divide large capacity data into smallest payload data and monitor ACK reception times, delaying subsequent data transmissions if the calculated transmission time exceeds a reference value, thereby preventing memory contention without requiring arbitration processing in the computation unit.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If arbitration processing is implemented to prevent memory contention, then memory access reliability is improved, but CPU processing load increases and constant cycle execution becomes difficult

Engineering Contradiction:
Improvememory access reliabilityVSAvoidCPU processing speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent extracts the arbitration function from the CPU and implements it in the protocol control part. The protocol control part independently monitors ACK reception timing and determines memory contention without CPU intervention, thereby preventing memory contention while keeping the CPU free for constant cycle processing.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The protocol control part performs self-service by autonomously detecting memory contention through ACK timing monitoring and independently controlling data transmission timing. This eliminates the need for CPU-based arbitration, reducing CPU load while maintaining memory access reliability.

Inventive Principle:
Principle #25Self-service

2Productivity

If multiple units access shared memory simultaneously, then data processing capability is improved, but memory contention occurs causing processing delays

Engineering Contradiction:
Improvedata processing capabilityVSAvoidprocessing delay
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent uses ACK reception timing as feedback to detect memory contention. The protocol control part monitors when ACK signals are received and determines contention based on timing deviations, then adjusts subsequent data transmission timing accordingly to prevent future contention and delays.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system dynamically adjusts data transmission timing based on real-time memory contention detection. When contention is detected through ACK timing analysis, the protocol control part modifies the timing of subsequent transmissions adaptively, allowing the system to maintain high data processing capability while minimizing delays.

Inventive Principle:
Principle #15Dynamics

3Reliability

If arbitration unit is added to manage memory access, then memory access control is improved, but device complexity increases

Engineering Contradiction:
Improvememory access controlVSAvoidsystem structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent makes the protocol control part multi-functional by combining its existing data transmission control functions with memory contention detection and arbitration functions. This eliminates the need for a separate arbitration unit, maintaining memory access control reliability while avoiding increased device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentEP3971721B1Information processing device
Publication Date: 2025.01.15 OMRON CORP
  • EP3971721B1 patent drawingFigure 1
  • EP3971721B1 patent drawingFigure 2
  • EP3971721B1 patent drawingFigure 3

AI summary

The present invention suppresses the occurrence of memory contention without executing, in an operation unit of a control device, a reconciliation process for preventing memory contention. Provided is a unit (20) that causes transmission of smallest payload data (D8) to a communication interface (42) to be in standby during a time period (T3) from a time (t5), at which it is determined that a transmission time (T2) of smallest payload data (D6) exceeds a reference value during a control cycle (C2), to a time (t6) at which the communication interface (42) transmits the smallest payload data (D8) to be transmitted next after the most recent smallest payload data (D7) transmitted at the time (t5).