Protocol Conversion Bridge Controller Synthesis

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Solution Overview

Problem

Conventional methods for generating a Register Transfer Level (RTL) description of protocol conversion bridges are error-prone, tedious, and inefficient, particularly when dealing with pipelined protocols, and are not compatible with existing technologies for developing embedded processors and systems-on-a-chip.

Innovation Solution

A method to generate pin-accurate and cycle-accurate protocol conversions between synchronous protocols, allowing for efficient timing and storage usage, compatible with existing technologies, by computing protocol conversions from accessed transactions and generating instructions for a combined controller or pipelined protocol conversions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If manual writing of RTL description is used, then accuracy can be maintained, but the process becomes tedious and error-prone

Engineering Contradiction:
ImproveaccuracyVSAvoiddevelopment efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system automatically generates RTL descriptions by analyzing protocol specifications and transaction formats, making the tool serve itself without requiring manual writing of conversion logic. The automated analyzer extracts conversion rules from protocol definitions and synthesizes RTL code directly.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The manual mechanical process of writing RTL descriptions is replaced by an automated computer system that uses algorithmic analysis of protocol specifications. The system substitutes human manual coding with automated computational generation based on protocol patterns.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Productivity

If conventional automated techniques are used, then productivity improves, but timing and storage efficiency deteriorates

Engineering Contradiction:
Improvegeneration speedVSAvoidtiming efficiency
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The system dynamically adjusts the generated RTL description based on protocol requirements, creating adaptive conversion logic that optimizes timing behavior. The generator can produce different conversion strategies depending on the specific protocol characteristics and performance requirements.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes parameters in the generated RTL code to optimize timing and storage efficiency, such as adjusting buffer sizes, wait state durations, and conversion timing sequences based on protocol analysis results.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If conventional automated techniques are used, then generation speed improves, but storage efficiency deteriorates due to buffering requirements

Engineering Contradiction:
Improvegeneration speedVSAvoidstorage requirement
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The system extracts only the essential conversion logic from the entire transaction buffer, separating the critical conversion functionality from unnecessary buffering. This extraction allows minimal storage requirements while maintaining conversion capability.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Instead of buffering entire transactions, the system performs partial conversion actions by processing protocol elements incrementally and selectively, using only the minimum necessary storage for intermediate conversion states.

Inventive Principle:
Principle #16Partial or excessive action

4Productivity

If pipelined protocols are handled, then productivity improves, but complexity of the conversion increases

Engineering Contradiction:
Improvetransaction throughputVSAvoidconversion complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system segments the protocol conversion process into distinct pipeline stages, separating different conversion operations into manageable sections. This segmentation allows complex pipelined protocols to be handled through modular conversion blocks that process transactions independently.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system performs preliminary analysis of pipelined protocol structures before generation, pre-computing conversion patterns and pipeline timing sequences. This preliminary processing simplifies the actual RTL generation by preparing conversion logic in advance based on protocol patterns.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS7512732B1Method of protocol conversion between synchronous protocols that are suitable for synthesis
Publication Date: 2009.03.31 MIPS HLDG INC
  • US7512732B1 patent drawing
  • US7512732B1 patent drawing
  • US7512732B1 patent drawing

AI summary

Protocol conversion is disclosed. A first transaction of a first protocol and a second transaction of a second protocol are accessed. From the accessed transactions, a plurality of protocol conversions are computed. Additional transactions of the first protocol and additional transactions of the second protocol can be accessed, and further protocol conversions applicable between the additional first and the second transactions can be computed. Based on at least some of the applicable protocol conversions, a combined controller that is able to convert between the transactions of the first and second protocols is generated. Instructions that are operable to describe the combined controller are stored in a computer readable medium.