Protocol Converter for Memory Module Data Transmission

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Solution Overview

Problem

Current integrated circuit systems are limited by the DRAM protocol, which restricts the types of information that can be transmitted and does not allow for efficient operation of multiple memory devices or protocol conversion, limiting data storage and calculation capabilities.

Innovation Solution

An integrated circuit system that includes a host device and a memory module with a protocol converter, enabling communication using a packet-based protocol between the host device and memory module, allowing for protocol conversion and the inclusion of an accelerator to supplement host device calculations, thereby enhancing operation speed and flexibility.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the DRAM protocol is used for communication between host device and memory module, then data transmission is synchronized with clock signal, but the types of information that can be transmitted are limited

Engineering Contradiction:
Improvesynchronized data transmissionVSAvoidtypes of information transmitted
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

A protocol converter is introduced as an intermediary component between the host device and memory devices. The protocol converter receives packet-based protocol signals from the host device, converts them to DRAM protocol signals for communication with memory devices, and vice versa for responses. This mediator enables the system to maintain reliable synchronized transmission while expanding information transmission capabilities through packet-based protocol's versatility.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Quantity of substance

If multiple memory devices are operated simultaneously, then data storage capacity increases, but protocol compatibility and coordination become more complex

Engineering Contradiction:
Improvedata storage capacityVSAvoidprotocol coordination complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The protocol converter serves as a centralized intermediary that manages communication with multiple memory devices. It handles protocol conversion for each device individually, coordinating their operations through a unified packet-based interface from the host. This approach enables multiple memory devices to operate simultaneously with increased storage capacity while the protocol converter manages the coordination complexity centrally.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The protocol converter is designed with multi-functional capability to handle different types of information packets (command packets, data packets, response packets) and convert them to appropriate DRAM protocol signals for different memory devices. This universal design allows the same component to manage multiple memory devices with diverse operation requirements, reducing overall system complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Adaptability or versatility

If packet-based protocol is implemented for versatile information transmission, then information types increase, but compatibility with existing DRAM protocol systems decreases

Engineering Contradiction:
Improveinformation transmission flexibilityVSAvoidprotocol conversion requirement
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The protocol converter acts as a translation intermediary between the packet-based protocol and DRAM protocol. It receives versatile packet-based information from the host device, converts it to traditional DRAM protocol signals for memory device compatibility, and converts DRAM protocol responses back to packet-based format. This mediator enables information transmission flexibility while maintaining compatibility with existing DRAM protocol systems through automatic translation.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Productivity

If accelerator is added to memory module for calculation supplementation, then operation speed increases, but device complexity increases

Engineering Contradiction:
Improveoperation speedVSAvoidmemory module structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The accelerator is merged with the memory module to form an integrated computing-storage unit. The accelerator works in conjunction with the protocol converter and memory devices, enabling calculations to be performed directly within the memory module. This merging increases operation speed by reducing data transfer distances and enabling parallel processing, while the integrated design manages the added complexity through unified control architecture.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10860518B2Integrated circuit system
Publication Date: 2020.12.08 SK HYNIX INC
  • US10860518B2 patent drawing
  • US10860518B2 patent drawing
  • US10860518B2 patent drawing

AI summary

An integrated circuit system includes a host device; and a memory module suitable for communicating with the host device according to a first protocol, the memory module comprising: at least one memory device suitable for storing data or outputting stored data, and executing communication according to a second protocol; and a protocol converter suitable for transferring information among the host device and the at least one memory device, wherein information to be inputted to the at least one memory device is transferred by being converted according to the second protocol and information to be outputted from the at least one memory device is transferred by being converted according to the first protocol.