Telecommunication Protocol Engine for Memory-Limited Processors
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Solution Overview
Problem
Implementing multiple digital telecommunication protocols on Customer Premises Equipment (CPE) with restricted computational resources and hardware costs, while maintaining ease of use and low cost, is challenging due to the complexity of modern digital networks.
Innovation Solution
A telecommunications gateway utilizing a telecommunication protocol engine (TPE) implemented with inexpensive, memory-limited microprocessors and flash memory, which represents protocols as Finite State Machines (FSMs) executed by a virtual machine, allowing for the implementation of various protocols like SIP, H.323, DHCP, and STUN, and enabling user control through a CPE Control Protocol.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple digital telecommunication protocols are implemented on CPE, then protocol functionality and versatility are improved, but device complexity and memory requirements increase
Solution Approach 1:
The patent implements a universal protocol execution environment that can run multiple different telecommunication protocols (SIP, H.323, DHCP, STUN, etc.) on a single CPE device. This multi-functional approach allows one device to perform various protocol functions without requiring separate specialized hardware for each protocol, thereby improving versatility while managing complexity through standardization.
Solution Approach 2:
The patent uses flash memory to store protocol implementations as readable code, creating a copyable and loadable representation of protocol logic. This allows protocol implementations to be stored as data structures or bytecode that can be loaded into memory and executed, separating the protocol logic from the hardware architecture and reducing the complexity of hardwiring each protocol.
2Adaptability or versatility
If multiple digital telecommunication protocols are implemented on CPE, then protocol functionality is improved, but memory requirements increase
Solution Approach 1:
The patent segments protocol implementations into separate loadable modules or bytecode programs that can be individually stored in flash memory and selectively loaded into RAM. This segmentation allows the system to store multiple protocol implementations without loading them all simultaneously, reducing the active memory requirements while maintaining the capability to execute multiple protocols on demand.
Solution Approach 2:
The patent stores protocol logic as readable code in flash memory, creating a compact representation that can be efficiently stored and executed. This copying approach allows protocol implementations to be represented as data structures or bytecode that occupy minimal space compared to traditional hardwired implementations, reducing overall memory requirements while maintaining full protocol functionality.
3Ease of manufacture
If protocol implementations are optimized for low cost and limited resources, then manufacturing cost is reduced, but computational resource availability decreases
Solution Approach 1:
The patent replaces traditional mechanical or hardware-based protocol implementations with a software-based execution environment running on inexpensive microprocessors. By substituting physical protocol-specific circuitry with a universal software interpreter that executes protocol bytecode, the system achieves lower manufacturing costs while maintaining sufficient computational capability through efficient software-based protocol processing.
Solution Approach 2:
The patent changes the fundamental parameter of protocol implementation from hardware-based to software-based execution. This parameter change allows the use of low-cost, general-purpose microprocessors instead of expensive protocol-specific hardware, reducing manufacturing costs while the virtualized execution environment maintains adequate computational resources for protocol processing tasks.
Data Source
AI summary
A system and method for implementing large and/or multiple telecommunication protocols utilizing memory-limited processors. Telecommunication protocols are expressed as virtual machine instructions defining a finite state machine. A telecommunication protocol engine implements the telecommunication protocols using a virtual machine operating under the control of a CPU. A telephony gateway comprising a telecommunication protocol engine interfaces with a communication device and a packet switched network. A network of telephony gateways communicating with a provider gateway facilitates communication over a packet switched network. A call placed by a calling telephony gateway to a receiving device on the same network or another network is routed according to a prefix in a telephone code sent by the calling telephony gateway.