Interconnection Protocol Frame Receiving Efficiency

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Solution Overview

Problem

Current interconnection protocols, such as UFS, face inefficiencies in data frame receiving due to the time lag between frames caused by unequal processing speeds in the data link layer, leading to reduced throughput and increased idle time, especially when handling back-to-back frames.

Innovation Solution

A method where a hardware protocol engine pre-fetches symbols of a second frame while sending data from a first frame to the network layer, allowing data from the second frame to be sent once the first frame's data is processed, thereby reducing idle time and enhancing the efficiency of frame receiving in the data link layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the data link layer processes frames sequentially (waiting for complete frame reception before processing), then processing accuracy is maintained, but throughput decreases and idle time increases

Engineering Contradiction:
Improveframe receiving efficiencyVSAvoididle time between frames
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by pre-fetching symbols of the second frame into a buffer before the first frame's data transmission is complete. This allows the data link layer to prepare subsequent processing work in advance, eliminating idle time between frame processing while maintaining sequential processing accuracy through buffered data.

Inventive Principle:
Principle #10Preliminary action

2Speed

If the data link layer waits for complete frame reception before processing, then data integrity is ensured, but processing speed decreases

Engineering Contradiction:
Improvedata transmission speedVSAvoiddata integrity
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent introduces a buffer as an intermediary between the symbol reception and data processing stages. Symbols are pre-fetched and stored in the buffer before processing begins, allowing continuous data flow without compromising the integrity of individual frame processing. The buffer acts as a mediator that decouples the timing between reception and processing operations.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If sequential frame processing is used, then processing simplicity is maintained, but throughput is reduced

Engineering Contradiction:
ImprovethroughputVSAvoidprocessing sequence complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the frame processing into distinct phases: symbol pre-fetching into buffer, buffer management, and data processing. This segmentation allows multiple frames to be in different processing stages simultaneously, increasing throughput while keeping each segment's logic simple and manageable through clear separation of concerns.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11811897B2Method for data processing of frame receiving of an interconnection protocol and storage device
Publication Date: 2023.11.07 SK HYNIX INC
  • US11811897B2 patent drawing
  • US11811897B2 patent drawing
  • US11811897B2 patent drawing

AI summary

A method for data processing of frame receiving of an interconnection protocol and a storage device, for use in a first device linkable to a second device according to the interconnection protocol. The method includes: in processing of frames originating from the second device and received by the first device: while sending data contained in a first frame to a network layer from a data link layer, pre-fetching symbols of a second frame; and after the data contained in the first frame are sent to the network layer and the symbols of the second frame are pre-fetched, sending data contained in the second frame to the network layer. Upon receipt of back-to-back frames, the efficiency of the frame receiving at the data link layer is enhanced.