Protocol Stack Buffer Separation for Low-Latency Packet Processing
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Solution Overview
Problem
Existing radio communication networks face challenges in achieving low latency and efficient data processing due to fronthaul limitations and lack of AC-specific latency considerations in the protocol stack, particularly in edge computing scenarios, leading to suboptimal performance for delay-sensitive applications.
Innovation Solution
Implementing a buffer-based processing method that separates AC-specific data packets from non-AC data packets in designated separate buffers, prioritizing processing of AC-specific data packets at respective layers to reduce latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If traditional integrated RAN systems process all data packets through the complete protocol stack, then processing completeness is maintained, but latency increases for delay-sensitive applications
Solution Approach 1:
The patent segments the protocol stack processing into two distinct paths: a complete processing path for non-AC data packets and a shortened processing path for AC-specific data packets. This segmentation allows AC packets to skip certain processing steps (SDAP, PDCP, RLC layers) while non-AC packets receive full processing, thereby reducing latency for time-sensitive applications without compromising the processing completeness required for other traffic
Solution Approach 2:
The patent applies local quality by providing different processing qualities to different types of data packets based on their requirements. AC-specific packets receive expedited processing with reduced protocol stack steps, while non-AC packets receive standard complete processing. This differential processing approach optimizes latency for delay-sensitive applications while maintaining robust processing for other traffic types
2Loss of time
If AC-specific data packets are prioritized in separate buffers, then latency for delay-sensitive applications is reduced, but device complexity increases
Solution Approach 1:
The patent segments the buffer structure into separate AC-specific buffers and non-AC buffers, allowing independent management and prioritization of different traffic types. This segmentation simplifies the prioritization logic by physically separating traffic streams, reducing the complexity of implementing priority queues while achieving low latency for AC packets
Solution Approach 2:
The patent performs preliminary classification of incoming packets into AC-specific and non-AC categories before processing, routing them to appropriate buffers and processing paths in advance. This preliminary action prevents the need for complex real-time priority arbitration during processing, reducing device complexity while maintaining low latency for time-sensitive traffic
3Speed
If the complete protocol stack is processed for all packets, then processing thoroughness is maintained, but processing speed decreases
Solution Approach 1:
The patent implements dynamic processing path selection based on packet type identification. The system adaptively chooses between the complete processing path and the shortened AC-specific path, adjusting the processing thoroughness dynamically according to the urgency and type of each packet. This dynamic approach increases processing speed for AC packets while maintaining reliability through complete processing of non-AC packets
Data Source
AI summary
An apparatus of a communication device, the apparatus may include: a memory; and a processor configured to: receive a plurality of data packets at a layer of a network protocol stack;determine a result, wherein the result represents whether a data packet of the plurality of data packets belongs to an application client; provide instructions to cause the memory to store the data packet within either a first buffer or a second buffer based on the result; and process, at the layer of the network protocol stack, the plurality of data packets stored in the first buffer and the second buffer.


