Protruding Alignment Patterns on Semiconductor Substrates

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Solution Overview

Problem

Current semiconductor packages face challenges in achieving high performance and efficiency due to complex fabrication processes and limited integration capabilities, particularly in stacking multiple devices effectively.

Innovation Solution

The proposed solution involves a circuit board and semiconductor package design with a mother substrate featuring scribing regions, through vias, and protrusion patterns, allowing for simplified fabrication and efficient stacking of semiconductor chips, with alignment patterns aiding in precise alignment and integration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If complex fabrication processes are used to achieve high performance semiconductor packages, then performance and efficiency improve, but manufacturing complexity and cost increase

Engineering Contradiction:
ImproveperformanceVSAvoidfabrication process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Alignment patterns are formed on the substrate before chip stacking, enabling precise alignment to be established in advance. This preliminary alignment structure simplifies subsequent chip placement processes while ensuring high positioning accuracy for multi-chip stacking, resolving the contradiction between performance and fabrication complexity

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The alignment pattern acts as an intermediary element between the substrate and stacked chips. This intermediate structure facilitates precise alignment without requiring complex alignment mechanisms, enabling high-performance multi-chip packages through a simplified fabrication process

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If multiple devices are stacked to increase integration capability, then memory capacity and transmission rate improve, but alignment precision requirements increase

Engineering Contradiction:
Improveintegration capabilityVSAvoidalignment precision
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

Alignment patterns are pre-formed on the substrate surface before chip stacking begins. These patterns serve as reference markers that enable precise alignment of multiple chips during the stacking process, allowing high integration capability to be achieved while maintaining manufacturing precision through a simplified alignment approach

Inventive Principle:
Principle #10Preliminary action

3Ease of manufacture

If traditional alignment methods are used, then fabrication process remains simple, but alignment precision and stacking accuracy deteriorate

Engineering Contradiction:
Improvefabrication simplicityVSAvoidalignment accuracy
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

Alignment patterns are formed on the substrate in advance as a preliminary step before chip stacking. This pre-established alignment reference system maintains fabrication simplicity while dramatically improving alignment accuracy and stacking precision, resolving the contradiction between ease of manufacture and manufacturing precision

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The alignment pattern serves as an intermediary reference structure that bridges the substrate and stacked chips. This intermediate element enables high precision alignment to be achieved without complicating the fabrication process, as the patterns provide clear visual or optical references for positioning

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10128224B2Circuit boards and semiconductor packages including protruding pattern on substrate
Publication Date: 2018.11.13 SAMSUNG ELECTRONICS CO LTD
  • US10128224B2 patent drawing
  • US10128224B2 patent drawing
  • US10128224B2 patent drawing

AI summary

A circuit board comprises a mother substrate including first and second scribing regions, the first scribing region extending in first direction, the second scribing region extending in second direction, the first and second directions crossing each other, the mother substrate including chip regions defined by the first and second scribing regions, and a through via penetrating the chip regions of the mother substrate. The mother substrate comprises a first alignment pattern protruding from a top surface of the mother substrate. The first alignment pattern is disposed on at least one of the scribing regions.