Protruding Gate Electrode for Power MISFET Alignment and Resistance
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Solution Overview
Problem
Conventional techniques for manufacturing power MISFETs with trench gate structures face challenges in miniaturization due to limitations in photolithography technology, leading to alignment accuracy issues and increased gate resistance, which hinder the advancement of device structure shrinkage and cell density.
Innovation Solution
A method of manufacturing power MISFETs that involves forming a gate trench and gate electrode using self-alignment techniques, allowing the gate electrode to protrude from the semiconductor substrate, and forming a body trench deeper than the source region, with a cobalt silicide film to reduce gate resistance and improve alignment accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If photolithography technology is used to form gate electrode and source region patterns, then manufacturing process is simplified, but alignment accuracy deteriorates and device miniaturization is limited
Solution Approach 1:
The gate electrode structure serves itself as the alignment reference for forming the source region. The protruding portion of the gate electrode automatically defines the position where the insulating film should be removed, eliminating the need for separate alignment marks and photolithography alignment processes. This self-alignment mechanism ensures high precision while maintaining process simplicity.
2Productivity
If device structure is miniaturized to improve cell density, then cell density increases, but gate resistance increases due to reduced cross-sectional area
Solution Approach 1:
The gate electrode is designed to protrude from the semiconductor substrate surface into the insulating film layer. This vertical extension adds a dimensional component that increases the effective cross-sectional area of the gate electrode without increasing the planar footprint. The protruding portion provides additional conduction path area, thereby reducing gate resistance while maintaining miniaturized cell density.
3Manufacturing precision
If gate electrode protrudes from semiconductor substrate, then alignment with source region improves, but insulating film thickness stability over gate electrode deteriorates
Solution Approach 1:
The insulating film is formed to cover the entire semiconductor substrate surface, including the protruding gate electrode, before any etching or pattern removal occurs. This preliminary formation ensures that the gate electrode is already protected and positioned correctly when subsequent processing steps are performed, maintaining both alignment precision and film thickness stability.
4Reliability
If body trench is formed deeper than source region, then electrical coupling between source and body contact improves, but manufacturing complexity increases
Solution Approach 1:
The body trench formation process is merged with the gate electrode protrusion structure. The same etching process that creates the gate trench also forms the body trench, and the protruding gate electrode automatically serves as the depth reference for the body trench. This merging of processes reduces manufacturing complexity while ensuring proper electrical coupling between the source region and body contact region.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables miniaturization of the device structure without the constraints of photolithography, reduces side effects like increased gate resistance, and enhances cell density by ensuring stable alignment and electrical coupling between the source and body contact regions.
Implementation Method 1
forming a cobalt silicide film to reduce gate resistance
Implementation Method 2
forming a body trench deeper than the source region, with self-alignment to the gate electrode
Data Source
AI summary
A gate trench 13 is formed in a semiconductor substrate 10. The gate trench 13 is provided with a gate electrode 16 formed over a gate insulating film 14. A portion of the gate electrode 16 protrudes from the semiconductor substrate 10, and a sidewall 24 is formed over a side wall portion of the protruding portion. A body trench 25 is formed in alignment with an adjacent gate electrode 16. A cobalt silicide film 28 is formed over a surface of the gate electrode 16 and over a surface of the body trench 25. A plug 34 is formed using an SAC technique.