Protruding MTJ Bottom Electrode Structure for Easier MRAM Integration

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Solution Overview

Problem

Existing MRAM devices face issues such as high chip area, high cost, high power consumption, limited sensitivity, and susceptibility to temperature variations, which affect their performance and efficiency.

Innovation Solution

A method for fabricating a semiconductor device involving the formation of a magnetic tunneling junction (MTJ) stack on a bottom electrode, with the electrode protruding above the inter-metal dielectric layer, using materials like titanium nitride for the bottom electrode and liner to minimize short circuits and improve integration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional MTJ structures are used with electrodes fully embedded in IMD layers, then planarity is maintained, but short circuit risk increases and integration is difficult

Engineering Contradiction:
Improveshort circuit riskVSAvoidintegration difficulty
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The bottom electrode is designed to protrude above the first IMD layer before subsequent processing steps. This preliminary positioning allows the MTJ stack to be formed directly on the protruding electrode, establishing proper alignment and reducing short circuit risk before the top electrode is formed and planarization is performed.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The electrode structure transitions from a fully planar two-dimensional layout to a three-dimensional structure with vertical protrusion. The bottom electrode extends upward above the IMD layer surface, creating a vertical dimension that facilitates MTJ stack formation while maintaining electrical isolation through the liner layer.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Area of stationary object

If chip area is reduced for higher density, then integration improves, but manufacturing precision requirements increase

Engineering Contradiction:
Improvechip areaVSAvoidfabrication precision
Core Design Contradiction:
Area of stationary objectVSManufacturing precision

Solution Approach 1:

The MTJ stack is formed directly on the protruding bottom electrode within the contact hole structure, nesting the magnetic tunneling junction precisely within the electrode configuration. This nested arrangement reduces lateral dimensions and chip area while the vertical protrusion maintains manufacturing tolerances.

Inventive Principle:
Principle #7Nested doll (Nesting)

3Use of energy by moving object

If power consumption is reduced for efficiency, then device performance improves, but manufacturing complexity increases

Engineering Contradiction:
Improvepower consumptionVSAvoidfabrication process complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

A liner layer is introduced as an intermediary between the bottom electrode and the MTJ stack. This liner layer serves multiple functions: it provides electrical isolation to prevent short circuits, facilitates the formation process, and enables the protruding electrode structure that reduces power consumption through improved tunneling efficiency.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution reduces the risk of short circuits and enhances the integration of MTJ structures, leading to improved performance and reduced chip area, cost, and power consumption.

Implementation Method 1

The characterization of utilizing GMR materials to generate different resistance under different magnetized states could also be used to fabricate MRAM devices

Methodology Applied
Scientific EffectMagnetic tunneling effect: Magnetoresistance

Implementation Method 2

forming a magnetic tunneling junction (MTJ) stack on the bottom electrode layer; and removing the MTJ stack and the bottom electrode layer to form a MTJ on a bottom electrode

Methodology Applied
Scientific EffectElectrical insulation: Dielectric

Data Source

PatentUS20250212696A1Semiconductor device and method for fabricating the same
Publication Date: 2025.06.26 UNITED MICROELECTRONICS CORP
  • US20250212696A1 patent drawing
  • US20250212696A1 patent drawing
  • US20250212696A1 patent drawing

AI summary

A method for fabricating a semiconductor device includes the steps of: forming a first inter-metal dielectric (IMD) layer on a substrate; forming a contact hole in the first IMD layer; forming a bottom electrode layer in the contact hole; forming a magnetic tunneling junction (MTJ) stack on the bottom electrode layer; and removing the MTJ stack and the bottom electrode layer to form a MTJ on a bottom electrode. Preferably, the bottom electrode protrudes above a top surface of the first IMD layer.