Protrusion Pad IC Substrate for Flip Chip Warpage Control

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Solution Overview

Problem

Flip chip semiconductor packages with coreless substrates are prone to warpage due to insufficient mechanical strength, leading to poor solder connections and reduced assembly yield.

Innovation Solution

An integrated circuit packaging substrate design featuring a main body with embedded conductive lines and protrusion pads, where the protrusion pads protrude from the main body and are configured to be in electrical contact with solder portions, with carefully determined spacings and widths to prevent solder and pad bridges, enhancing mechanical strength and assembly yield.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If coreless substrates are used in flip chip semiconductor packages, then the package size is reduced, but the mechanical strength is insufficient leading to warpage

Engineering Contradiction:
Improvepackage sizeVSAvoidmechanical strength
Core Design Contradiction:
Volume of moving objectVSStrength

Solution Approach 1:

The substrate is divided into a main body portion and protrusion pads. The main body remains coreless for miniaturization, while the protrusion pads extend outward to provide additional mechanical support and increase the contact area with the semiconductor chip, thereby preventing warpage without increasing overall package size.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The protrusion pads extend in the vertical dimension from the main body surface, increasing the contact area with the chip without expanding the horizontal footprint. This dimensional approach allows mechanical strength enhancement while maintaining small package size.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If protrusion pads are designed with larger contact area, then assembly yield is improved, but the risk of solder bridges and short circuits increases

Engineering Contradiction:
Improveassembly yieldVSAvoidsolder bridges and short circuits
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The protrusion pads are designed with non-uniform widths along their length. The width varies at different positions to optimize the balance between contact area and solder bridge prevention. This local variation in geometry allows larger contact area for improved assembly yield while maintaining adequate spacing to prevent solder bridges and short circuits.

Inventive Principle:
Principle #3Local quality

3Volume of moving object

If the spacing between protrusion pad and conductive line is reduced, then the package size is minimized, but manufacturing precision requirements increase

Engineering Contradiction:
Improvepackage sizeVSAvoidspacing precision
Core Design Contradiction:
Volume of moving objectVSManufacturing precision

Solution Approach 1:

The spacing between the protrusion pad and the conductive line is optimized to a specific range (5-15 μm). This parameter optimization allows minimal package size while maintaining sufficient manufacturing precision. The specific spacing value balances miniaturization goals with achievable manufacturing tolerances.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10043774B2Integrated circuit packaging substrate, semiconductor package, and manufacturing method
Publication Date: 2018.08.07 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US10043774B2 patent drawing
  • US10043774B2 patent drawing
  • US10043774B2 patent drawing

AI summary

An integrated circuit (IC) packaging substrate includes a main body, at least one first conductive line, at least one second conductive line, and at least one protrusion pad. The first conductive line is embedded in the main body. The second conductive line is embedded in the main body. The protrusion pad is disposed on the first conductive line. The protrusion pad protrudes from the main body and is configured to be in electrical contact with a solder portion of a semiconductor chip. A first spacing between the protrusion pad and the second conductive line is determined in accordance with a process deviation of the protrusion pad by the width of the protrusion pad and the width of the first conductive line. Moreover, a semiconductor package having the IC packaging substrate and a manufacturing method of the semiconductor package are also provided.