Proximity Disturb Remediation in Memory Subsystems

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Solution Overview

Problem

Proximity disturb effects in memory devices, where accessing one memory cell can inadvertently alter nearby cells, leading to data loss due to reduced isolation between cells, necessitate efficient remediation methods to prevent errors beyond error correction limits.

Innovation Solution

A method to determine proximity disturb effects based on the number of programmed bits in memory cells, using a single read voltage to assess the distribution of memory cells and trigger remediation only when the number of programmed cells exceeds a threshold, reducing computational resources, power, and time required for error correction.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If a single read voltage is used to assess memory cell distribution, then computational resources and power consumption are reduced, but measurement precision deteriorates compared to multiple voltage readings

Engineering Contradiction:
Improvepower consumptionVSAvoidproximity disturb detection accuracy
Core Design Contradiction:
Use of energy by moving objectVSMeasurement precision

Solution Approach 1:

The patent changes the parameter of read voltage from multiple voltage levels to a single read voltage, thereby reducing power consumption while maintaining sufficient detection capability through alternative assessment methods

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

Instead of performing full error correction on all memory cells, the patent applies partial action by only remediation cells that exceed the proximity disturb threshold, reducing overall computational resources and power usage

Inventive Principle:
Principle #16Partial or excessive action

2Reliability

If full data read and error correction is performed during every check, then data integrity is ensured, but productivity deteriorates due to increased computing resources and time requirements

Engineering Contradiction:
Improvedata integrityVSAvoidmemory operation efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies partial error correction only to memory cells that exceed the proximity disturb threshold rather than correcting all cells, thereby maintaining data integrity for affected cells while improving overall productivity by reducing unnecessary correction operations

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The system uses the natural distribution pattern of programmed memory cells to self-identify cells requiring remediation, eliminating the need for comprehensive data reads and enabling selective correction that maintains reliability while improving efficiency

Inventive Principle:
Principle #25Self-service

3Volume of stationary object

If memory cells are placed closer together to increase density, then volume efficiency improves, but proximity disturb effects worsen due to reduced isolation between cells

Engineering Contradiction:
Improvememory device densityVSAvoidproximity disturb effects
Core Design Contradiction:
Volume of stationary objectVSObject-affected harmful factors

Solution Approach 1:

The patent performs preliminary assessment of memory cell distribution patterns before executing full error correction, identifying cells susceptible to proximity disturb effects in advance and preparing targeted remediation to counteract the harmful effects of reduced cell isolation

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system continuously monitors the distribution of programmed memory cells and uses this feedback to dynamically determine when proximity disturb remediation is necessary, adapting to changing conditions and maintaining data integrity despite reduced cell isolation

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11501840B1Proximity disturb remediation based on a number of programmed memory cells
Publication Date: 2022.11.15 MICRON TECHNOLOGY INC
  • US11501840B1 patent drawing
  • US11501840B1 patent drawing
  • US11501840B1 patent drawing

AI summary

A method is described that includes determining, by a memory subsystem controller of a memory device, a number of memory cells from a set of memory cells that are in a programmed state. The memory subsystem controller further compares the number of memory cells from the set of memory cells that are in the programmed state to a proximity disturb threshold and in response to determining that the number satisfies the proximity disturb threshold, performs a remediation operation on user data stored in the set of memory cells.