Proxy Compacted Parameters for IC Timing Analysis
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Solution Overview
Problem
The increasing complexity of integrated circuits and the need for accelerated design and testing phases pose a challenge in reducing runtime overhead for statistical static timing analysis, as existing methods require testing multiple parameters individually, leading to increased development time and complexity.
Innovation Solution
A method and system that determine suitable parameters for compaction by identifying dependencies in clock and data routing, redefine these parameters into proxy compacted parameters, and perform timing analysis using these proxies, thereby reducing the number of parameters tested and corners needed for testing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple parameters are tested individually in statistical static timing analysis, then measurement precision and reliability are improved, but runtime overhead and development time increase
Solution Approach 1:
The patent merges multiple routing parameters (clock routing parameters and data routing parameters) into a single combined parameter space. By defining a unified parameter representation that captures both clock and data routing dependencies, the system reduces the number of separate parameter tests needed while maintaining comprehensive timing analysis coverage, thereby reducing runtime overhead without sacrificing reliability
Solution Approach 2:
The patent creates a universal parameter framework that serves multiple functions: it represents both clock routing characteristics and data routing characteristics through a single parameter structure. This multi-functional parameter system eliminates the need for separate testing procedures for different parameter types, reducing overall analysis time while maintaining thorough evaluation of timing characteristics
2Manufacturing precision
If multiple parameters are tested individually, then manufacturing precision and environmental variation coverage are improved, but device complexity and testing complexity increase
Solution Approach 1:
The patent combines clock routing parameters and data routing parameters into a unified parameter representation. This merging reduces the number of separate testing scenarios required to cover manufacturing variations and environmental conditions, thereby reducing testing complexity while maintaining comprehensive coverage of parameter variations through the integrated parameter framework
3Productivity
If parameters are redefined into proxy compacted parameters, then productivity and development speed are improved, but measurement precision may be affected
Solution Approach 1:
The patent creates proxy compacted parameters that are simplified representations (copies) of the original complex parameter combinations. These proxy parameters capture the essential timing characteristics while being computationally simpler to test, thereby increasing productivity. The proxy parameters are designed to maintain sufficient precision for timing analysis by preserving the critical timing relationships between clock and data routing
Solution Approach 2:
The patent transforms the original complex parameter representation into simplified proxy compacted parameters through parameter redefinition. This parameter transformation reduces the computational complexity of timing analysis while maintaining the essential timing information needed for accurate measurement, thus improving productivity without significantly compromising measurement precision
Data Source
AI summary
Reducing the runtime overhead needed for testing of an integrated circuit design. A determination may be made of parameters that clock routing and data routing in an integrated circuit are dependent upon. A determination is made of whether the parameters are suitable for compaction, such as by determining whether the parameters are utilized in only one of clock routing or data routing. The parameters suitable for compaction are defined or redefined into at least one proxy compacted parameter. A timing analysis for the integrated circuit is performed using the proxy compacted parameter instead of performing the timing analysis using the parameters suitable for compaction.


