Pseudo Complementary Output Buffer for Timing Skew Reduction
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Solution Overview
Problem
In silicon chips with multiple parallel outputs, power and ground noise can cause significant timing skew among outputs due to differences in output delay timings, especially when most outputs switch in one direction and one output switches against the others.
Innovation Solution
Implementing a complementary output buffer that switches in the opposite direction of the real output buffer, with adjustable capacitance to match the load, which cancels out noise signals by averaging them across both buffers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple parallel outputs switch in different directions simultaneously, then output data diversity is improved, but timing skew among outputs increases due to power and ground noise
Solution Approach 1:
The patent introduces a pseudo output buffer that generates counteracting noise signals to compensate for the noise generated by the real output buffers. When real buffers switch in one direction, the pseudo buffer switches in the opposite direction, creating equal but opposite noise signals that cancel each other out, thereby reducing timing skew while maintaining output data diversity
Solution Approach 2:
The patent creates a pseudo output buffer that is a functional copy of the real output buffer, with identical circuit structure and parameters. This pseudo copy generates noise signals that mirror the real buffer's noise characteristics, enabling effective noise cancellation through opposite switching patterns
2Manufacturing precision
If a pseudo complementary output buffer is added, then timing skew is reduced by canceling noise signals, but device complexity increases
Solution Approach 1:
Instead of designing a complex noise cancellation system from scratch, the patent uses a simplified copy (pseudo buffer) that mirrors the real buffer's structure. This approach reduces the complexity of the cancellation mechanism while maintaining effectiveness, as the pseudo buffer inherits the noise characteristics of the real buffer by design
Solution Approach 2:
The patent controls the switching behavior of the pseudo buffer by inverting the switch control signals compared to the real buffer. This parameter change (inverting control signals) enables the pseudo buffer to generate opposite noise signals without requiring structural modifications, thus minimizing added complexity
3Adaptability or versatility
If output buffers switch at different timings, then output synchronization deteriorates, but data pattern flexibility is improved
Solution Approach 1:
The patent implements a feedback mechanism where the pseudo output buffer's switching behavior is determined by the switching patterns of the real output buffers. By monitoring the control signals of the real buffers and inverting them for the pseudo buffer, the system dynamically adjusts to maintain synchronization across different data patterns while preserving flexibility
Data Source
AI summary
A system may include a first inverter configured to invert a first data signal and a second inverter configured to invert a second data signal. A pull-up element may be coupled to an output of the first inverter on a first terminal and a power source on a second terminal, wherein the power source is also coupled to a pull-up element of a main output buffer. A pull-down element may be coupled to an output of the second inverter on a first terminal and a ground on a second terminal, wherein the ground is also coupled to a pull-down element of the main output buffer.