Pseudo-Random Clock Circuit With Code Limiter for EMI Control
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Solution Overview
Problem
High-frequency clock circuits generate significant electromagnetic interference (EMI), and existing spread spectrum clocking techniques, while reducing EMI, often result in broad bandwidth that interferes with AC to DC systems and increase material costs due to the need for digital to analog converters.
Innovation Solution
A pseudo random clock generator with a code limiter and logic gate that maintains a pseudo random code value for at least two clock signal periods, using a single oscillator and eliminating the need for a digital to analog converter, thereby controlling frequency range and reducing material costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If spread spectrum clocking is used to reduce EMI emissions, then electromagnetic interference is reduced, but spread bandwidth increases causing interference with AC to DC systems
Solution Approach 1:
The patent changes the parameter of code transition frequency by using a code limiter that forces the pseudo-random code to remain unchanged for at least two clock periods. This reduces the high-frequency transitions that contribute to wide bandwidth spread, thereby reducing EMI emissions while minimizing bandwidth expansion that would interfere with AC to DC systems.
Solution Approach 2:
The code limiter introduces periodic holding of code values, creating a more regular pattern in the pseudo-random sequence. By maintaining each code value for at least two complete clock periods before transitioning, the signal exhibits more periodic behavior that concentrates energy at lower frequencies rather than spreading it across a wide bandwidth.
2Area of stationary object
If digital to analog converter is employed to limit frequency range, then frequency range is controlled, but material cost increases
Solution Approach 1:
The patent replaces the mechanical/electronic digital to analog converter with a purely digital solution - a code limiter implemented in the digital pseudo-random code generation logic. This digital approach achieves frequency range control through logical operations and timing control rather than requiring analog conversion hardware, thereby eliminating the need for additional costly components.
Solution Approach 2:
The pseudo-random code generator inherently limits its own frequency range through the code limiter mechanism. The system uses its own internal clock signal and logic gates to control the transition timing of code values, achieving self-regulation of frequency range without requiring external analog conversion circuitry or additional control components.
Data Source
AI summary
A pseudo random clock generator includes a clock generator for generating a clock signal. A pseudo random code generator receives the clock signal and thereby generating a pseudo random code. A code limiter enables the value of the pseudo random code being unchanged for at least two periods of the clock signal. A logic gate applies a logic operation to the pseudo random code and the clock signal and thereby outputting a pseudo random clock.