Pseudo-Static RAM Dynamic Delay Control for Faster Data Transfer

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Solution Overview

Problem

Existing pseudo-static random access memory (pSRAM) technologies face limitations in improving data transmission speed due to initial delays in read and write operations, which cannot be shortened until the delay period is complete.

Innovation Solution

The pSRAM incorporates a control unit that controls the delay in subsequent operations to be less than the initial delay by using specific commands and conditions, such as not precharging the word line or detecting errors, allowing for reduced latency in data transfer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the initial delay is maintained for read and write operations, then the reliability of data transmission is ensured, but the data transmission speed deteriorates

Engineering Contradiction:
Improvedata transmission speedVSAvoidinitial delay time
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The patent applies dynamics by making the delay period adjustable rather than fixed. The control unit dynamically changes the delay period based on operation types (read/write) and timing conditions. Specifically, when a read command is followed by a write command to the same address, the delay period for the write operation is reduced. This dynamic adjustment resolves the contradiction by allowing short delays when reliability is less critical and longer delays when reliability is needed.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameter of delay period length based on operation conditions. The control unit modifies the delay period parameter according to the type of operation (read or write) and the timing relationship between consecutive operations. By changing this parameter dynamically, the system achieves both fast data transmission (when short delay is sufficient) and reliable data transmission (when long delay is needed).

Inventive Principle:
Principle #35Parameter changes

2Productivity

If the delay period is shortened for subsequent operations, then the productivity is improved, but the reliability may deteriorate

Engineering Contradiction:
Improvedata transfer efficiencyVSAvoiddata transmission reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The control unit changes the delay period parameter based on specific conditions: when a read command is executed first and then a write command to the same address is executed, the delay period for the write operation is shortened. This conditional parameter change improves productivity while maintaining reliability by only shortening the delay when the timing relationship between operations ensures data integrity.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The system dynamically adjusts the delay period based on the sequence and type of operations. The control unit monitors the timing relationship between consecutive commands and adjusts the delay period accordingly. This dynamic adjustment allows the system to optimize productivity by shortening delays when safe to do so, while maintaining reliability when full delay periods are required.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS12380933B2Pseudo-static random access memory
Publication Date: 2025.08.05 WINBOND ELECTRONICS CORP
  • US12380933B2 patent drawing
  • US12380933B2 patent drawing
  • US12380933B2 patent drawing

AI summary

A pseudo-static random access memory is provided herein, which may improve the speed of data transmission. After a first delay from a command and a row address being input in a first operation, the pseudo-static random access memory inputs or outputs the data in the memory cells corresponding to the input row address and the input column address, which includes a control unit controlling a delay in the second operation less than the initial delay when a specific condition is satisfied. The second operation is executed after the first operation.