Pseudorandom Thread Scheduling for CPU Verification Reproducibility
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Solution Overview
Problem
In CPU design verification, especially for multiprocessing systems, reproducibility of instruction sequences is challenging due to non-deterministic thread execution order, making it difficult to isolate and reproduce errors, which hinders efficient bug fixing and verification.
Innovation Solution
A pseudorandom thread scheduling framework that uses a seed value for a pseudorandom number generator to produce reproducible thread execution sequences, combined with interchangeable scheduling algorithms to simulate various thread scheduling scenarios, enabling consistent and comprehensive testing of CPU functions and states.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If random instruction sequence generation is used to test CPU design, then comprehensive testing of all possible states and functions is achieved, but reproducibility of test sequences is lost making error isolation difficult
Solution Approach 1:
The patent applies parameter changes by introducing a seed value parameter to the random instruction sequence generation process. By changing the randomness parameter from completely random to pseudorandom with a controllable seed, the system achieves both comprehensive testing capability and reproducibility. The same seed value produces identical test sequences across different verification runs, enabling error isolation while maintaining thorough coverage of CPU design states and functions.
2Reliability
If deterministic thread execution order is enforced, then reproducibility of test sequences is achieved, but the ability to test various scheduling scenarios and non-deterministic behaviors is reduced
Solution Approach 1:
The patent applies dynamics by making the thread execution order configurable rather than fixed. The system can dynamically switch between deterministic execution order for reproducible testing and non-deterministic execution order for comprehensive scheduling scenario testing. This dynamic adaptability allows the same verification platform to serve multiple testing objectives depending on the selected execution mode.
Solution Approach 2:
The patent changes the execution order parameter from fixed deterministic to configurable pseudorandom based on seed values. This parameter change enables the system to reproduce specific scheduling scenarios while also allowing exploration of different scheduling behaviors, thus maintaining both reproducibility and versatility in testing various CPU scheduling scenarios.
3Adaptability or versatility
If multiple threads are executed in parallel to simulate multiprocessing, then comprehensive coverage of CPU functions is improved, but verification complexity and resource requirements increase
Solution Approach 1:
The patent applies copying by creating virtual model threads that replicate CPU thread behavior in a simplified verification environment. These model threads copy the essential characteristics of real CPU threads including context switching, scheduling, and execution patterns, but without the full complexity of actual multiprocessing hardware. This copying approach enables comprehensive multiprocessing simulation while reducing verification complexity through abstraction.
Data Source
AI summary
Implementations are directed to methods, systems, and computer-readable media for scheduling threads for instruction sequence generation. In one aspect, scheduling threads for instruction sequence generation can include obtaining a model of a central processing unit (CPU) that includes a plurality of threads, wherein the model includes a plurality of model threads that correspond to the plurality of threads of the CPU. A seed value can be input into a pseudorandom number generator and in response to the input seed value, a sequence of pseudorandom values can be obtained from the pseudorandom number generator. Using the sequence of pseudorandom values and a thread scheduling algorithm, a thread execution order of the plurality of model can be generated.