PSK Modulator and Demodulator Using Integer Phase Shifts
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Solution Overview
Problem
Conventional phase shift keying (PSK) communication technologies face signal distortion and quality reduction when passing through non-linear power amplifiers, and existing semiconductor devices struggle with noise in PSK signals during modulation and demodulation processes.
Innovation Solution
A semiconductor device with a modulator and demodulator for PSK communication, utilizing a reference clock generator, phase locked loop, integer divider circuit, and processing unit to generate and transmit phase-shifted signals, and a phase detector circuit to reduce noise in the output signal, allowing for efficient PSK modulation and demodulation without the need for an analog mixer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional PSK modulation is used with non-linear power amplifier, then signal transmission is achieved, but signal distortion occurs and quality reduces
Solution Approach 1:
The phase shift operation is segmented into discrete integer steps, where each symbol represents a specific phase offset from the carrier signal. This segmentation allows the non-linear power amplifier to operate at fixed, predictable phase points rather than continuous phase transitions, reducing distortion.
Solution Approach 2:
The invention changes the parameter representation from continuous phase angles to discrete integer values multiplied by a phase interval. This parameter transformation enables the system to work effectively with non-linear amplifiers by constraining phase variations to specific quantized levels.
2Measurement precision
If traditional PSK demodulation is used, then phase detection is performed, but noise occurs in the output signal
Solution Approach 1:
The demodulator uses feedback mechanisms to compare the received signal phase with reference phases corresponding to expected symbol values. This feedback approach allows the system to identify and correct noise-induced phase deviations by referencing the known discrete phase levels.
Solution Approach 2:
Instead of directly measuring the absolute phase and converting it to a symbol, the invention inverts the approach by comparing the received phase against reference phases and identifying which reference best matches. This inversion reduces noise sensitivity by working with phase differences rather than absolute phase values.
3Ease of operation
If analog mixer is used in PSK modulation, then phase shifting is achieved, but device complexity increases
Solution Approach 1:
The invention replaces the mechanical/analog mixer-based phase shifting system with a digital signal processing approach. Phase shifting is achieved through digital multiplication of the carrier by complex exponential terms calculated from integer phase values, eliminating the need for analog mixers and reducing overall system complexity.
Solution Approach 2:
The digital phase shifting mechanism serves multiple functions: it performs modulation, enables precise phase control, and facilitates easy integration with digital signal processing chains. This universal digital approach replaces multiple specialized analog components with a single multi-functional digital block.
Data Source
AI summary
Provided are a semiconductor device including a modulator for PSK communication and a semiconductor device including a demodulator for PSK communication, and a PSK communication system. The semiconductor device includes a reference clock generator to generate a reference clock signal, a phase locked loop (PLL) to receive the reference clock signal and generate a first clock signal, an integer divider circuit to generate a second clock signal by delaying a rising edge of the reference clock signal by a product of a predetermined integer value included in transmission data and a phase interval, and a processing unit to generate a first transmission signal. The first transmission signal is phase-shifted from a first rising edge of the second clock signal. The phase interval is dependent on a ratio of the frequency of the first clock signal to the frequency of the reference clock signal.