PSR and Adaptive Sync Synchronization Maintenance
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Solution Overview
Problem
Current systems fail to contemporaneously utilize Panel Self-Refresh (PSR) and adaptive synchronization technologies due to disruptions in synchronization between graphics control circuitry and display control circuitry, leading to inefficiencies in power management and performance in graphics-intensive applications.
Innovation Solution
Implementing a system that maintains or re-establishes frame-level synchronization between a source device and an adaptive sync sink device using AUX_FRAME_SYNC, bidirectional FS_HDP, secondary sideband communication pathways, and GTC-based presentation time stamps, ensuring synchronization during PSR/PSR2 operating mode and upon exiting it.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If Panel Self-Refresh (PSR) mode is activated to reduce power consumption, then power usage decreases, but synchronization between source device and sink device is disrupted
Solution Approach 1:
The system performs preliminary actions by storing frame data in the sink device's frame buffer before entering PSR mode. This allows the display to continue showing stored frames while power consumption is reduced, and synchronization can be restored quickly when exiting PSR mode without losing frame data or synchronization state
Solution Approach 2:
The patent introduces an intermediary mechanism where the sink device's frame buffer acts as a mediator between the source device and display panel during PSR mode. The frame buffer stores frame data locally, allowing the display to operate independently from the source device, thus maintaining synchronization while reducing power consumption
2Productivity
If adaptive synchronization is implemented to reduce latency in graphics-intensive applications, then performance improves, but complexity of the synchronization system increases
Solution Approach 1:
The system implements feedback mechanisms where the sink device monitors frame arrival timing and adjusts vertical blanking duration accordingly. This feedback loop allows adaptive synchronization to respond to varying frame rates in real-time, improving performance while the patent manages complexity by using standardized DisplayPort protocols and established synchronization methods
Solution Approach 2:
The patent applies dynamics by making the vertical blanking duration variable rather than fixed. The sink device dynamically adjusts the blanking period based on when frames arrive from the source device, allowing the system to adapt to different frame rates and rendering performance requirements without requiring a completely new synchronization architecture
3Loss of energy
If PSR mode is entered to minimize bandwidth usage, then power consumption decreases, but synchronization timing between source and sink devices becomes misaligned
Solution Approach 1:
Before entering PSR mode, the system performs preliminary actions by ensuring the sink device has received and stored the current frame data in its frame buffer. This preliminary preparation allows the system to minimize bandwidth usage during PSR mode while maintaining synchronization timing, as the stored frame can be displayed continuously without requiring ongoing bandwidth allocation
Solution Approach 2:
The patent uses copying by creating a local copy of the frame data in the sink device's frame buffer. This copy allows the display to continue showing the frame content without requiring continuous data transmission from the source device, thus minimizing bandwidth energy while preserving synchronization timing through the use of DisplayPort's built-in timing mechanisms
Data Source
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AI summary
The present disclosure is directed to systems and methods of maintaining source device to sink device synchronization in systems in which the source device enters a Panel Self-Refresh (PSR/PSR2) mode and the sink device enables adaptive synchronization with the source device. To maintain synchronization, in some instances the source device and the sink device may maintain synchronization contemporaneous with at least a portion of the PSR/PSR2 operating mode. To maintain synchronization, in some instances, a high-bandwidth communications link may be maintained between the source device and the sink device. In some instances, synchronization between the source device and the sink device may be interrupted upon the source device entering the PSR/PSR2 operating mode and may be re-established upon the source device exiting the PSR/PSR2 operating mode.