Power Supply Rejection Circuit Using Dummy Transistor Matching

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Solution Overview

Problem

Existing power supply rejection circuits are ineffective at rejecting noise across a wide range of frequencies and consume significant silicon area, failing to adequately protect voltage-controlled oscillators from high-frequency noise prevalent in modern integrated devices.

Innovation Solution

A power supply rejection circuit utilizing a dummy circuit and current supply circuit, which emulates the DC characteristics of the functional circuit, provides a noise-free output current across a wide frequency range without using capacitors, thereby minimizing silicon area and effectively blocking high-frequency noise.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a power supply rejection circuit is designed to reject noise across a wide frequency range, then noise rejection performance is improved, but circuit complexity and silicon area increase

Engineering Contradiction:
Improvenoise rejection performanceVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent changes the operating parameters of the transistor (biasing conditions, gate voltage) to achieve wide frequency range noise rejection. By adjusting the transistor's operating point and using negative threshold voltage devices, the circuit achieves -35 dB noise rejection from 10 Hz to 8 GHz without complex frequency-selective components

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent extracts and eliminates capacitors from the power supply rejection circuit. By removing these energy storage components, the circuit achieves wide frequency noise rejection without the area and complexity penalties associated with traditional capacitor-based filtering approaches

Inventive Principle:
Principle #2Taking out (Extraction)

2Reliability

If a power supply rejection circuit uses capacitors for noise filtering, then noise rejection is improved, but silicon area consumption increases

Engineering Contradiction:
Improvenoise rejection performanceVSAvoidsilicon area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent explicitly removes capacitors from the power supply rejection circuit architecture. The noise filtering function is achieved through transistor-based current regulation and dummy circuit matching instead of capacitor-based filtering, eliminating the need for large silicon area capacitor structures

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent substitutes the traditional capacitor-based passive filtering mechanism with an active transistor-based current regulation system. This replacement uses field-effect transistor physics (channel conduction, gate control) instead of capacitive energy storage, achieving the same noise rejection function with reduced area

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Reliability

If existing power supply rejection circuits are used, then low-frequency noise is rejected, but high-frequency noise rejection is insufficient

Engineering Contradiction:
Improvelow-frequency noise rejectionVSAvoidfrequency range coverage
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent changes the transistor parameters (using negative threshold voltage transistors, adjusting bias currents) to extend the noise rejection bandwidth to high frequencies. The dummy circuit is designed to match the functional circuit's DC characteristics, enabling effective rejection up to 8 GHz

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The power supply rejection circuit is designed to universally reject noise across the entire frequency spectrum from 10 Hz to 8 GHz. The circuit structure using transistors and dummy circuits provides multi-functional noise rejection capability that adapts to both low-frequency and high-frequency noise conditions

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS8669754B2Low supply regulator having a high power supply rejection ratio
Publication Date: 2014.03.11 ICERA INC
  • US8669754B2 patent drawing
  • US8669754B2 patent drawing
  • US8669754B2 patent drawing

AI summary

A power supply noise rejection circuit for functional circuits, such as a voltage controlled oscillator (VCO). The power supply noise rejection circuit includes an isolation transistor connected to a voltage supply for providing an output current and voltage substantially free of noise across the full frequency range. A current source, a diode connected reference transistor with resistance means connected between its gate and drain terminals, and a dummy circuit serially connected between the voltage supply and ground generate a bias voltage that is applied to the gate of the isolation transistor. The dummy circuit mimics the DC characteristics of the functional circuit such that the output current tracks with process and temperature variations. The isolation transistor and the reference transistor can have negative threshold voltages, and the circuit can include bleed means for drawing current from the gate of the reference transistor and isolation transistor.