PSRAM Refresh Collision Protection Circuit
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Solution Overview
Problem
Prior art PSRAM devices face issues with refresh collision due to delayed hidden refresh requests conflicting with external commands, requiring large buffers and complicating control, leading to potential data loss and increased chip area.
Innovation Solution
A method and device that utilize an internal refresh oscillator and a refresh collision protecting circuit to issue and manage refresh requests, ignoring subsequent requests if the interval between them is not larger than a predetermined duration to prevent collisions and ensure data retention.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If delayed hidden refresh requests are stored in buffers to prevent data loss, then data retention is improved, but chip area increases due to large buffer requirements
Solution Approach 1:
The patent extracts the problematic delayed refresh requests from the buffer system entirely. By detecting refresh collisions before they occur and preventing the generation of delayed refresh requests, the invention eliminates the need for large buffers to store these requests, thereby reducing chip area while maintaining data retention through collision prevention
Solution Approach 2:
The patent performs preliminary detection of refresh collisions by comparing the timing of external commands with scheduled refresh operations before executing them. By identifying potential conflicts in advance and adjusting refresh timing proactively, the system prevents data loss without requiring buffers to store delayed requests
2Reliability
If multiple buffers are used to store delayed hidden refresh commands, then refresh collision protection is improved, but device complexity increases
Solution Approach 1:
The patent removes the complex buffer management system entirely by taking out the approach of storing delayed requests. Instead, it implements a simpler collision detection and prevention mechanism that actively manages refresh timing to avoid conflicts, thereby reducing device complexity while maintaining refresh collision protection
Solution Approach 2:
The refresh controller performs self-service by autonomously detecting potential refresh collisions and adjusting its own operation timing without requiring external buffer management or complex control logic. The system monitors its own refresh schedule against external commands and autonomously prevents conflicts
3Reliability
If hidden refresh requests are delayed to avoid external commands, then refresh operation reliability is improved, but loss of time increases due to execution delays
Solution Approach 1:
The patent performs preliminary detection of refresh collisions before they occur by comparing scheduled refresh timing with external command timing. By identifying potential conflicts in advance, the system can proactively adjust refresh timing to execute at optimal moments without unnecessary delays, thereby maintaining reliability while reducing time loss
Solution Approach 2:
The patent implements dynamic refresh timing adjustment where the refresh controller adaptively modifies refresh operation timing based on real-time detection of external command patterns. This dynamic approach allows the system to maintain reliable refresh operations while minimizing execution delays by scheduling refreshes at the most efficient moments
Data Source
AI summary
A plurality of refresh requests are generated at a predetermined period shorter than the longest time during which a PSRAM is able to retain a data without being refreshed. For two consecutive first and second refresh requests, the second refresh request is ignored if the interval between the first and the second refresh requests is not larger than a predetermined duration. The first refresh request is delayed if the first refresh request conflicts with an external command of the PSRAM.