Power Supply Unit Capacitor for Persistent Cache Flushing

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Solution Overview

Problem

Existing server systems face challenges in ensuring persistent cache flushing during power loss events, particularly due to the limitations of battery backup units (BBUs) and the complexity of asynchronous hardware reset events.

Innovation Solution

The proposed solution utilizes system power supply units (PSUs) to provide auxiliary energy for flushing volatile system memory to persistent memory after power loss, extending the hold-up window to complete a full flush of processor caches and memory controller buffers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a battery backup unit (BBU) is used to provide auxiliary energy for persistent cache flushing, then data integrity during power loss is improved, but device footprint, cost, and thermal constraints worsen

Engineering Contradiction:
Improvedata integrityVSAvoiddevice footprint
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent extracts the energy storage function from a dedicated BBU component and relocates it to the PSU's bulk capacitor, which already exists in the system. This eliminates the need for a separate BBU device, reducing device footprint while maintaining the ability to provide auxiliary energy for persistent cache flushing during power loss events

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The PSU's bulk capacitor is made multi-functional by having it serve both its traditional role in power conversion and stabilization, and an additional role as the energy source for persistent cache flushing during power loss. This eliminates the need for dedicated energy storage hardware while maintaining data integrity

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If a battery backup unit (BBU) is used to provide auxiliary energy for persistent cache flushing, then data integrity during power loss is improved, but system cost worsens

Engineering Contradiction:
Improvedata integrityVSAvoidsystem cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent extracts the energy storage function from a dedicated BBU component and relocates it to the PSU's bulk capacitor, which already exists in the system. This eliminates the need for a separate BBU device, reducing device footprint while maintaining the ability to provide auxiliary energy for persistent cache flushing during power loss events

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The PSU's bulk capacitor is made multi-functional by having it serve both its traditional role in power conversion and stabilization, and an additional role as the energy source for persistent cache flushing during power loss. This eliminates the need for dedicated energy storage hardware while maintaining data integrity

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If the hold-up window is extended to complete a full flush of processor caches, then data integrity is improved, but energy consumption worsens

Engineering Contradiction:
Improvedata integrityVSAvoidenergy consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies partial action by providing auxiliary energy only for the specific duration needed to complete the cache flush operation during power loss, rather than continuously powering the system. The bulk capacitor provides just enough energy to maintain power rails long sufficient to flush caches and memory buffers, then allows the system to shut down, optimizing energy usage while ensuring data integrity

Inventive Principle:
Principle #16Partial or excessive action

4Speed

If asynchronous hardware reset events are allowed to trigger reset without persistent flush handler, then system responsiveness is improved, but data integrity worsens

Engineering Contradiction:
Improvesystem responsivenessVSAvoiddata integrity
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent implements preliminary action by having the system detect asynchronous reset events and automatically trigger a persistent flush handler before the reset occurs. This preliminary cache flush ensures data integrity is maintained even during externally initiated reset events, while the automatic detection and handling minimize the impact on system responsiveness

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables persistent cache flushing without the need for a BBU, ensuring data integrity by maintaining a persistent memory state even during power disruptions, while also reducing the complexity of managing asynchronous reset events.

Implementation Method 1

A portion of the energy to hold-up the power rails long sufficient to perform a persistent cache flush may come from bulk capacitors in the system PSUs

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentEP4314987B1System support for persistent cache flushing
Publication Date: 2025.04.23 ORACLE INT CORP
  • EP4314987B1 patent drawingFigure 1
  • EP4314987B1 patent drawingFigure 2
  • EP4314987B1 patent drawingFigure 3

AI summary

Techniques are described herein for flushing volatile system memory to persistent memory after the loss of alternating current (AC) power. In some embodiments, the techniques include implementing an extended hold-up window long enough to complete a full flush of processor caches and memory controller buffers using energy available in the bulk capacitors of one or more power supplies after a power outage event. The voltage on the bulk capacitors within the one or more power supply units may be monitored, and a notification may be triggered when a programmable threshold voltage is detected on the bulk capacitors. The system may configure the voltage threshold to indicate that a certain minimum amount of energy used to successfully complete a cache flush operation is available. The techniques allow flushing volatile system caches without relying on battery backup units (BBUs), which may be cumbersome to install and maintain.