PTP Clock Skew Estimation Using DPLL Frequency Lock
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Solution Overview
Problem
Clock skews between network devices lead to inaccurate communication path delay measurements, as existing methods require perfect synchronization and are often complex or limited to offline data analysis.
Innovation Solution
A method and system for estimating the skew of a slave clock relative to a master clock using one-way measurements via IEEE 1588 PTP, where a digital phase-locked loop synchronizes the slave clock to the master clock, allowing for accurate skew calculation and compensation in real-time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional delay measurement methods are used without clock skew compensation, then the measurement process is simple, but the measurement precision deteriorates due to clock skew between devices
Solution Approach 1:
The patent implements a feedback mechanism where the slave device continuously monitors the difference between its local clock and the master clock using PTP timestamps, calculates clock skew, and applies real-time compensation to delay measurements. This closed-loop feedback enables automatic skew correction without manual intervention, resolving the contradiction by maintaining high measurement precision while automating the complexity of clock synchronization.
Solution Approach 2:
The patent introduces PTP timing messages as an intermediary carrier that transports synchronized timestamp information from the master clock to the slave device. These intermediary messages enable the slave to derive accurate time references and calculate clock skew without direct physical connection to the master clock, simplifying the synchronization architecture while maintaining measurement precision.
2Productivity
If offline data analysis methods are used for clock skew estimation, then the device complexity is reduced, but the productivity deteriorates due to inability to perform real-time measurements
Solution Approach 1:
The patent performs preliminary clock skew estimation by continuously analyzing PTP timestamp differences between master and slave clocks before actual delay measurements are taken. This preliminary action establishes a real-time skew baseline that is then used to compensate subsequent measurements, enabling both real-time productivity and reduced processing complexity during actual measurement operations.
Solution Approach 2:
The patent maintains continuous clock skew estimation and compensation operations running in the background, ensuring that the skew correction process is always active and up-to-date. This continuous useful action allows the system to provide real-time delay measurements with ongoing skew compensation, achieving both high productivity and manageable complexity through sustained operational processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables accurate and real-time delay measurements by synchronizing the slave clock with the master clock, improving network performance and reducing the complexity of clock skew estimation.
Implementation Method 1
a digital phase-locked loop synchronizing the slave clock to the master clock
Data Source
AI summary
This invention relates to methods and systems for estimating skew based on, for example, the IEEE 1588 Precision Time Protocol (PTP). These methods and systems can allow the clock skew between a master clock (server) and slave clock (client) exchanging PTP messages over a packet network to be estimated. In one embodiment, the slave employs a digital phase-locked loop (DPLL) driven by timestamps supplied from a master clock. The slave is able to process the timestamp information embedded in PTP Sync and Follow_Up messages in order to lock its frequency to that of the master clock. In certain embodiments a frequency locked DPLL and a local free-running counter are used to estimate the skew of the local slave oscillator.