PTP Slave Clock Frequency Synchronization Over Packet Networks
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Solution Overview
Problem
Current frequency synchronization methods in mobile wireless networks face challenges in achieving precise frequency alignment between base stations, leading to channel interference, call drops, and performance degradation, especially in scenarios where GPS signals are inaccessible or costly to implement.
Innovation Solution
The implementation of the IEEE 1588 Precision Time Protocol (PTP) for frequency synchronization over packet networks, allowing slave clocks to synchronize with a master clock using timestamp-based message exchange, either through one-step or two-step clock algorithms, to adjust the frequency of the slave clock and maintain synchronization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If GPS receivers are deployed at each base station node for frequency synchronization, then synchronization accuracy is improved, but system cost and complexity increase significantly
Solution Approach 1:
The patent introduces an intermediary master clock system that coordinates frequency synchronization across the network. Instead of each base station independently using GPS, a centralized master clock receives GPS synchronization and distributes it to slave clocks at base stations through packet-based communication, reducing individual node complexity while maintaining overall network synchronization accuracy
Solution Approach 2:
The patent creates a virtual copy of the GPS-synchronized time reference by having the master clock generate and distribute timestamped synchronization packets to slave clocks. This allows each slave clock to obtain an accurate time reference without directly receiving GPS signals, effectively copying the synchronization benefit from the master clock to multiple slave nodes
2Device complexity
If traditional packet-based synchronization methods like NTP are used, then system cost is reduced, but synchronization accuracy deteriorates due to latency and jitter
Solution Approach 1:
The patent changes the critical parameters of packet-based synchronization by implementing hardware-level timestamping at packet boundaries and using a dedicated synchronization protocol (PTP) instead of general-purpose NTP. This transforms the packet handling process to minimize latency and jitter, achieving microsecond-level precision while maintaining packet network infrastructure
Solution Approach 2:
The patent segments the synchronization function from general data traffic by implementing separate synchronization packet handling paths with dedicated hardware timestamping. This separates the timing-critical functions from best-effort data transmission, ensuring that synchronization packets receive priority processing and minimal interference from network variability
3Measurement precision
If TDM backhaul connections are used for frequency synchronization, then synchronization accuracy is maintained, but adaptability to packet networks deteriorates
Solution Approach 1:
The patent substitutes the mechanical/electrical TDM synchronization interface with a packet-based digital interface. By implementing PTP over Ethernet, the system replaces dedicated TDM timing channels with flexible IP packets, allowing the same synchronization function to operate over standard packet networks while maintaining accuracy through hardware timestamping and dedicated protocol processing
Data Source
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AI summary
The present invention provides a method of synchronising the frequency of a slave clock to that of a master, preferably using a packet network. An aspects of the invention provide a method of synchronizing the frequency of a slave clock in a slave device to a master clock in a master device, the method including the steps of: a) receiving in the slave device a first message from said master device having a first time-stamp which is a time-stamp of said master clock indicating the time of sending of said first message; b) extracting said time- stamp from said message and initializing a counter in the slave device which counts an output of said slave clock; c) receiving in the slave device a further message from said master device and reading the value of said counter at the time of receipt of said further message; d) extracting a further time-stamp which is the precise time of sending of the further message according to said master clock; e) determining an error signal which is representative of the difference between said value of the counter and the difference between said first and further time-stamps; and f) adjusting the frequency of said slave clock based on said error signal. An apparatus for synchronizing the frequency of a clock in a slave device which is communicatively coupled to a master device is also provided.