PTP Timing Synchronization with Error Measurement Circuit

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Solution Overview

Problem

Existing timing synchronization systems face challenges in accurately synchronizing Time of Day (ToD) across different clock domains within network devices, particularly in non-congruent Full Timing Support (FTS) systems where system and physical layer domains have different reference clocks, leading to timing synchronization errors.

Innovation Solution

A flexible Precision Time Protocol (PTP) system that includes a system domain and a physical layer domain with different reference clocks, utilizing error measurement circuits to detect and adjust counter increment values and modulation frequencies to synchronize ToD across domains, minimizing phase and time differences between system and physical layer clocks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If different reference clocks are used in system and physical layer domains to support high-frequency data transfer, then data transfer capability is improved, but timing synchronization accuracy deteriorates

Engineering Contradiction:
Improvedata transfer frequencyVSAvoidtiming synchronization accuracy
Core Design Contradiction:
SpeedVSMeasurement precision

Solution Approach 1:

An error measurement circuit is introduced as an intermediary component between the system clock domain and physical layer clock domain. This circuit measures the timing difference between the two domains and provides feedback information that enables synchronization without requiring the domains to share the same reference clock, thus maintaining both high data transfer capability and timing synchronization accuracy

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system implements a feedback mechanism where the error measurement circuit continuously monitors the timing difference between system and physical layer domains, and this error information is used to adjust the counter increment values and modulation frequencies to minimize synchronization errors, enabling accurate timing synchronization despite using different reference clocks

Inventive Principle:
Principle #23Feedback

2Measurement precision

If counter increment values and modulation frequencies are adjusted to synchronize ToD across domains, then timing synchronization accuracy is improved, but system complexity increases

Engineering Contradiction:
Improvetiming synchronization accuracyVSAvoidsystem complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The system synchronizes Time of Day across different clock domains by dynamically adjusting parameters such as counter increment values and modulation frequencies. The error measurement circuit detects timing differences and triggers parameter adjustments in the physical layer domain to align ToD values, achieving synchronization through controlled parameter modifications rather than fundamental system redesign

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20240231417A9Timing synchronization system with error measurement
Publication Date: 2024.07.11 SKYWORKS SOLUTIONS INC
  • US20240231417A9 patent drawing
  • US20240231417A9 patent drawing
  • US20240231417A9 patent drawing

AI summary

Clocking systems are disclosed. A clocking system can include first and second clock domains. Each clock domain can include circuitry with a counter. The clocking system can measure timing errors between these two domains by measuring a phase difference and determining a residual error. Based on the measured timing error, the clocking system can synchronize the time in the first and second clock domains by using at least one of the counters.