Transparent Clock Converter for PTP Network Synchronization

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Solution Overview

Problem

Larger communication networks face challenges in timing synchronization due to the presence of non-PTP-aware network nodes, which can disrupt the precise synchronization needed for efficient communication and interference reduction.

Innovation Solution

A stand-alone system providing transparent clock functionality for optical network nodes, using transparent clock converters to set and adjust time-related fields in packets, allowing non-PTP-aware nodes to participate in precision time protocol operations and maintain synchronization with PTP-aware nodes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If non-PTP-aware network nodes are present in the network, then network compatibility and ease of deployment are improved, but timing synchronization precision deteriorates

Engineering Contradiction:
Improvenetwork compatibilityVSAvoidtiming synchronization precision
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The patent introduces transparent clock converters as intermediary devices between PTP-aware nodes and non-PTP-aware nodes. These converters intercept PTP packets passing through non-PTP nodes, add timestamp information indicating the packet's arrival and departure times at the converter, and forward the packets to the destination. This intermediary mechanism allows non-PTP nodes to transparently participate in PTP synchronization without requiring protocol awareness, thereby maintaining both network compatibility and timing precision.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If transparent clock converters are deployed to mask delays, then timing synchronization precision is improved, but device complexity increases

Engineering Contradiction:
Improvetiming synchronization precisionVSAvoiddevice complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the network into PTP-aware nodes, non-PTP nodes, and transparent clock converters. Each segment has a specific function: PTP nodes generate and process timing packets, non-PTP nodes simply forward packets without processing, and transparent clock converters add timestamp information. This segmentation allows the complex timestamping function to be isolated to specific devices rather than requiring all network nodes to implement full PTP functionality, thereby managing overall system complexity while achieving precise synchronization.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The transparent clock converters perform multiple functions: they act as standard network switches for forwarding packets, simultaneously function as timing measurement devices by capturing packet arrival and departure times, and serve as protocol translators by making non-PTP nodes transparent to PTP traffic. This multi-functionality reduces the need for separate dedicated timing devices, thereby managing complexity while achieving precise synchronization.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10257595B2PTP transparent clock system upgrade solution
Publication Date: 2019.04.09 IP GEM GRP LLC
  • US10257595B2 patent drawing
  • US10257595B2 patent drawing
  • US10257595B2 patent drawing

AI summary

A transparent clock converter is interposed between a non-precision time protocol (non-PTP) enabled network node and other portions of the network. The transparent clock converter effectively converts the non-PTP node into a transparent clock node. In some embodiments the transparent clock converter includes physical layer devices, but not media access controllers.