PUF Array Cells Hardened for Error Correction Coding
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Solution Overview
Problem
Conventional PUF circuits face challenges with high Bit Error Rate (BER), susceptibility to stress hardening attacks, and insecure storage of helper data, which limits their reliability and security, especially across varying temperatures and increases manufacturing costs.
Innovation Solution
The PUF array cells are hardened to their intrinsic value using intentional hot carrier stress, with helper data programmed directly into the PUF array, reducing BER to near zero, eliminating the need for separate non-volatile memory, and integrating ECC within the PUF array to enhance security and reduce costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error correction code (ECC) is applied to PUF data to reduce BER, then reliability is improved, but device complexity increases due to additional helper data storage requirements
Solution Approach 1:
The patent combines the PUF array and helper data storage into a single integrated structure. The helper data is stored within the same PUF array memory cells using different physical states (e.g., trapped charge configurations), eliminating the need for separate storage components and reducing overall device complexity while maintaining error correction capability
Solution Approach 2:
The PUF array cells are designed to serve multiple functions: storing both PUF data and helper data, providing both security functionality and error correction. The same physical memory cells can be configured to hold different types of data depending on the operational mode, reducing the need for dedicated separate storage components
2Reliability
If helper data is stored in non-volatile memory (NVM) for error correction, then reliability is improved, but security deteriorates due to potential information leakage
Solution Approach 1:
By integrating helper data storage within the PUF array itself rather than in separate NVM, the patent reduces the attack surface. The helper data is dispersed throughout the PUF array structure and protected by the same physical security mechanisms that protect the PUF data, making it harder to extract without triggering security responses
Solution Approach 2:
The patent uses specialized memory cell configurations that act as intermediaries between the PUF data and helper data. These cells can store helper information in a manner that is functionally accessible for error correction but physically obscured from direct probing or extraction attempts
3Reliability
If separate non-volatile memory is used for helper data storage, then error correction is enabled, but manufacturing cost increases
Solution Approach 1:
The patent merges the PUF array and helper data storage into a single memory structure, eliminating the need for separate NVM components. This integration reduces the total component count, simplifies the manufacturing process, and lowers overall device cost while maintaining full error correction functionality
Solution Approach 2:
The memory cells are designed to universally store both PUF data and helper data using the same fabrication process. This multi-functionality eliminates the need for separate manufacturing steps for different storage types, reducing manufacturing complexity and cost
4Ease of manufacture
If PUF array area is reduced to lower cost, then manufacturing cost decreases, but BER increases making error correction difficult
Solution Approach 1:
By integrating helper data storage within the PUF array, the patent achieves error correction capability without requiring additional array area. The same physical cells serve dual purposes, allowing compact design with low BER through proper cell configuration rather than through array expansion
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces the PUF array's area and manufacturing costs, enhances security by making it harder to probe for helper data, and simplifies the ECC algorithm, while maintaining low entropy and high reliability across temperature variations.
Implementation Method 1
The PUF array cells are hardened to their intrinsic value using intentional hot carrier stress
Data Source
AI summary
The disclosure generally provides methods, systems and apparatus for an improved a Physically Unclonable Function (PUF). In one embodiment, the disclosure relates to a method to provide data from a Physically Unclonable Function (PUF) circuit array. The method includes storing a plurality of first data bits into a respective ones of a plurality of first bitcells of the PUF array to form a first dataset; storing a plurality of second data bits into a respective ones of a plurality of second bitcells of the PUF array, the plurality of second data bits defining a helper dataset; reading the first dataset from the plurality of first bitcells to provide a first read dataset; applying an error correction factor to the first read data dataset to form a security key dataset; and outputting the security key dataset from the PUF circuit array.