PUF Bit Cell Stability Screening Under Injected Noise Stress
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Solution Overview
Problem
Physically unclonable function (PUF) generators in integrated circuits face instability due to dynamic noise, leading to unpredictable behavior and the need for a method to quickly evaluate and filter out unstable bit cells to produce reliable PUF signatures.
Innovation Solution
A PUF generator system that includes a PUF cell array, a noise injector, and a filtering mechanism to evaluate bit cell stability by introducing noise and comparing initial and stressed operation outputs, identifying and masking unstable bit cells to generate a stable PUF signature.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If noise is introduced to evaluate bit cell stability, then reliable PUF signatures can be generated by filtering unstable bit cells, but the system complexity increases due to the need for noise injection mechanisms and filtering circuits
Solution Approach 1:
The patent applies preliminary action by performing noise injection and bit cell stability evaluation during a pre-characterization phase before the PUF generator is deployed for authentication. This allows unstable bit cells to be identified and masked in advance, so that the actual authentication operation can proceed with already-filtered stable bit cells, eliminating the need for continuous complex filtering during operation.
Solution Approach 2:
The patent segments the PUF generator operation into two distinct phases: a characterization phase where noise is injected and unstable bit cells are identified, and an operation phase where only stable bit cells are used for authentication. This segmentation allows the complex noise injection and filtering mechanisms to be activated only when needed for characterization, rather than continuously during all operations.
2Measurement precision
If multiple PUF outputs are compared to identify unstable bit cells, then bit cell stability can be accurately evaluated, but the time required for PUF generator characterization increases
Solution Approach 1:
The patent applies partial action by comparing PUF outputs only for bit cells that are suspected to be unstable, rather than exhaustively analyzing every single bit cell. The noise injection targets specific bit cells, and comparisons are performed selectively to identify only those showing instability, thus reducing the overall characterization time while maintaining adequate evaluation accuracy.
3Productivity
If noise is injected into PUF cell power lines, then unstable bit cells can be quickly identified under stressed operation conditions, but the PUF cell operation becomes disrupted during evaluation
Solution Approach 1:
The patent applies periodic action by injecting noise into the PUF cell power lines in periodic pulses rather than continuously. The noise is applied for brief intervals to stress-test the bit cells and identify unstable ones, then removed to allow normal operation. This periodic approach enables quick evaluation while minimizing disruption to the overall PUF cell functionality.
Solution Approach 2:
The patent applies preliminary anti-action by temporarily introducing disruptive noise signals to counteract and expose instability in bit cells during the characterization phase. This deliberate disruption is applied only during evaluation, and normal stable operation is restored afterward, allowing the system to identify and mask problematic cells before they can cause issues during actual authentication.
Data Source
AI summary
Disclosed is a physical unclonable function generator circuit and method. In one embodiment, physical unclonable function (PUF) generator includes: a PUF cell array that comprises a plurality of bit cells, wherein each of the plurality of bit cells comprises at least two access transistors, at least one enable transistor, and at least two storage nodes, wherein the at least two storage nodes are pre-configured with substantially the same voltages allowing each of the plurality of bit cells having a first metastable logical state; a PUF control circuit coupled to the PUF cell array, wherein the PUF control circuit is configured to access the plurality of bit cells to determine second logical states by turning on the at least one enable transistor and turning off the at least two access transistors of each of the plurality of bit cells, and based on the second logical states of the plurality of bit cells, to generate a PUF output; and a noise injector coupled to the PUF control circuit and the PUF cell array, wherein the noise injector is configured to create stressed operation conditions to evaluate stability of the plurality of bit cells.