PUF Bit-Line Masking Circuit Against Optical Probing
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Solution Overview
Problem
Integrated circuits used in security applications, such as chip cards, are vulnerable to attacks that extract secret information like encryption keys through methods like semi-invasive optical contactless probing, which current countermeasures fail to effectively prevent, especially for SRAM-based Physical Uncloneable Functions (PUFs).
Innovation Solution
The implementation of a physical uncloneable function circuit with a bit-line masking circuit that applies conditional inversion and XOR masking to protect against optical contactless probing, using a combination of spatial, temporal, and geometrical countermeasures to obscure signal paths and minimize the Critical Time Interval, thereby rendering LVx signal averaging impossible.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of information
If optical contactless probing methods are used to extract secret information from integrated circuits, then secret data can be obtained, but security protection fails
Solution Approach 1:
The patent applies inversion by outputting the complement of the PUF bit instead of the direct bit value. The coupling circuit inverts the logical state (0 becomes 1, 1 becomes 0) before output, making optical probing attacks ineffective because the captured signal no longer directly reveals the secret PUF value. This is achieved through the coupling circuit connected between the PUF circuit element and the output terminal.
Solution Approach 2:
The coupling circuit acts as an intermediary between the PUF circuit element and the output terminal. It receives control signals and conditionally supplies either the original bit or its complement to the output, preventing direct observation of the PUF value through optical probing while maintaining functional access to the protected information.
2Reliability
If conditional inversion and XOR masking are applied to protect against probing, then security is improved, but circuit complexity increases
Solution Approach 1:
The patent segments the PUF output path into distinct functional components: the PUF circuit element, the coupling circuit with control signal input, and the output terminal. This segmentation allows the complex protection function to be implemented through a modular coupling circuit that conditionally inverts or passes through the PUF bit based on control signals, making the complexity manageable and localized.
3Object-affected harmful factors
If the Critical Time Interval is minimized to thwart signal averaging, then probing resistance improves, but timing precision requirements increase
Solution Approach 1:
The patent employs periodic action through clock signals that control the coupling circuit's operation. The control signal periodically switches between states, enabling the PUF bit or its complement to be supplied to the output in time intervals synchronized with the clock. This periodic control makes signal averaging ineffective while maintaining manageable timing requirements through standard clocking mechanisms.
Data Source
AI summary
According to one embodiment, a physical uncloneable function circuit for providing a protected output bit is described including at least one physical uncloneable function circuit element configured to output a bit of a physical uncloneable function value, a physical uncloneable function bit output terminal and a coupling circuit connected between the physical uncloneable function circuit element and the physical uncloneable function bit output terminal configured to receive a control signal, supply the bit to the physical uncloneable function bit output terminal for a first state of the control signal and supply the complement of the bit to the physical uncloneable function bit output terminal for a second state of the control signal.