PUF Chip Identity via Random-Dopant Fluctuation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing network security technologies are inadequate for small equipment with limited computational power, such as SIM-cards and sensors, as they require costly key-maintenance circuits that can be vulnerable to attacks, necessitating a more efficient and secure method for encryption and authentication.
Innovation Solution
The integration of a physically unclonable function (PUF) within standard CMOS technologies, utilizing random-dopant fluctuation to generate unique identification for each chip, eliminating the need for key-maintenance circuits and enhancing security through unpredictable and reproducible output.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If key-maintenance circuits are added to ensure security in small equipment, then security is improved, but chip cost increases
Solution Approach 1:
The patent extracts the security function from traditional key-maintenance circuits and implements it through a physically unclonable function (PUF) that leverages inherent manufacturing variations. The PUF circuit generates cryptographic keys directly from physical characteristics of the chip itself, eliminating the need for separate key storage and management circuits, thereby reducing chip cost while maintaining security.
Solution Approach 2:
The PUF circuit enables the chip to generate its own unique cryptographic identifiers and keys based on its inherent physical characteristics. Each chip automatically creates its own security credentials through the PUF mechanism without requiring external key management infrastructure, making the system self-sufficient and reducing overall implementation cost.
2Reliability
If key-maintenance circuits are added to ensure security, then security is improved, but the circuit becomes vulnerable to attacks
Solution Approach 1:
The patent converts manufacturing variations, which are traditionally considered defects or sources of uncertainty, into a security asset. The PUF mechanism deliberately exploits these random dopant fluctuations and physical imperfections to generate unique, unclonable cryptographic identifiers. What was previously harmful (manufacturing variability) becomes the foundation of security, making the system resistant to attacks since the security credentials are physically embedded and impossible to replicate.
3Ease of manufacture
If standard CMOS technology is used for PUF implementation, then manufacturing cost is reduced, but achieving sufficient security unpredictability becomes difficult
Solution Approach 1:
The patent focuses on enhancing local variations within specific regions of the PUF circuit rather than relying on overall circuit complexity. By designing the PUF to exploit localized random dopant fluctuations in critical path transistors, the invention achieves high unpredictability using standard CMOS processes. The security strength comes from amplifying and measuring these local physical variations rather than requiring advanced manufacturing technology.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach provides secure and cost-effective encryption and authentication by leveraging random-dopant fluctuation to create unique chip identities, preventing unauthorized access and reducing hardware costs, while maintaining high security standards.
Implementation Method 1
utilizing random-dopant fluctuation to generate unique identification for each chip
Data Source
AI summary
An integrated circuit and a code generating method are described. The integrated circuit includes a plurality of field effect transistors, a plurality of sense-amplifiers, and a processing circuit. Each field effect transistor is configured to represent an address in a mapping table and includes a source, a drain, a channel and a gate. Each sense-amplifier is connected to the drain and configured to sense an electric current from the drain and identify a threshold voltage of the corresponding field effect transistor. The processing circuit is configured to categorize each of the threshold voltages identified by the corresponding sense-amplifiers into a first state and a second state and mark the state of each of the threshold voltages at the corresponding address in the mapping table.