PUF Random Code Generation Using Verified Cell Mapping
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Solution Overview
Problem
Conventional random code generators for semiconductor chips face issues with accuracy due to low reliability PUF cells, which can result in erroneous random codes, preventing normal operation of the semiconductor chip.
Innovation Solution
A random code generator comprising a PUF cell array, a control circuit, and a verification circuit that enrolls and verifies PUF cells, determining normal PUF cells and generating mapping information to accurately read their states and produce a random code, thereby ensuring the semiconductor chip's proper functioning.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional PUF cells are used to generate random codes, then the random code generation function is achieved, but the accuracy deteriorates due to low reliability PUF cells producing erroneous codes
Solution Approach 1:
The patent applies preliminary action by performing verification on PUF cells during an enrollment phase before actual random code generation. The verification circuit pre-identifies reliable PUF cells and stores their indices in a lookup table, so that only verified reliable cells are used during operational phases, preventing erroneous codes from low-reliability cells
Solution Approach 2:
The patent implements feedback by using a verification circuit that reads PUF cell outputs and provides feedback information about cell reliability. This feedback mechanism allows the system to identify and exclude low-reliability PUF cells from random code generation, thereby improving overall code accuracy while maintaining the use of manufacturing variations
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution ensures the generation of accurate random codes by identifying and excluding low reliability PUF cells, ensuring the semiconductor chip operates correctly by using a PUF cell array with a control and verification circuit to determine and record normal PUF cells' states for code generation.
Implementation Method 1
if the voltage difference between the gate terminal and the source/drain terminal of the antifuse transistor beyond the withstanding voltage, the gate oxide layer of the antifuse transistor is ruptured and thus the antifuse transistor is changed from the high resistance state to a low resistance state
Data Source
Figure 1A~1B
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AI summary
A random code generator is installed in a semiconductor chip and includes a PUF cell array, a control circuit and a verification circuit. The PUF cell array includes m×n PUF cells. The control circuit is connected with the PUF cell array. While a enroll action is performed, the control circuit enrolls the PUF cell array. The verification circuit is connected with the PUF cell array. While a verification action is performed, the verification circuit determines that p PUF cells of the PUF cell array are normal PUF cells and generates a corresponding a mapping information, wherein p is smaller than m×n. While the semiconductor chip is enabled, the control circuit reads states of the p normal PUF cells of the PUF cell array according to the mapping information and generates a random code according to the states.