PUF Interconnect Layout Using L-Shaped Metal Lines for Code Uniqueness
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Solution Overview
Problem
Current IoT devices face significant information security risks due to the inadequacy of software-based security designs, which can be compromised by counterfeit chips or other hardware-related threats, necessitating a hardware-based security solution.
Innovation Solution
A semiconductor structure featuring an interconnect design with L-shaped metal lines and vias in the back-end-of-line (BEOL) process, which generates a unique and random voltage distribution across PUF cells, enhancing the randomness and uniqueness of the generated random codes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If software-based security design is used, then implementation is simple and cost-effective, but security reliability is insufficient against hardware threats
Solution Approach 1:
The patent introduces an intermediary layer (PUF cell array with L-shaped metal lines and vias) between the software security layer and the physical hardware layer. This intermediary structure captures and amplifies inherent manufacturing variations to generate unique electrical fingerprints, bridging the gap between software implementation ease and hardware-based security reliability.
2Ease of manufacture
If conventional interconnect structures are used, then manufacturing process is simple, but randomness and uniqueness of PUF codes are insufficient
Solution Approach 1:
The patent employs asymmetric L-shaped metal line structures instead of conventional symmetric interconnect patterns. The L-shape configuration creates unequal current paths and enhances sensitivity to manufacturing variations, thereby improving the randomness and uniqueness of PUF codes while maintaining compatibility with standard manufacturing processes.
Solution Approach 2:
The patent extends the PUF structure into the vertical dimension by stacking multiple metal layers with vias connecting L-shaped lines across different layers. This three-dimensional configuration multiplies the sources of manufacturing variations and enhances the electrical fingerprint uniqueness compared to planar two-dimensional structures.
3Device complexity
If PUF structure uses simple metal lines, then device complexity is low, but read voltage range and random code generation quality are limited
Solution Approach 1:
The patent implements a nested hierarchical structure where L-shaped metal lines are embedded within an array of PUF cells, which are further nested within multiple metal layers connected by vias. This nested configuration compactly integrates complex three-dimensional interconnect structures without proportionally increasing device footprint, thereby improving read voltage range while controlling overall complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution significantly enhances the random code generation in PUFs, improving the uniqueness and robustness of the electrical fingerprint, thereby strengthening the hardware security of IoT devices and reducing the risk of unauthorized access or tampering.
Implementation Method 1
resistance variation resulted from metal layers, vias and electrical connection therebetween in back-end-of-line (BEOL) process
Data Source
AI summary
An interconnect for physically unclonable function (PUF), comprised of multiple arranged PUF cells. Each PUF cell includes at least two L-shaped metal line, wherein each L-shaped metal line includes a first part and a second part and is adjacent to a dummy metal line, and the first part of one L-shaped metal line is electrically connected to adjacent second part of another L-shaped metal line through via in vertical direction.