PUF Memory Cell Structure for Limited-Use Secure Code Delivery
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Solution Overview
Problem
Physical unclonable functions (PUFs) in integrated circuits face challenges in distinguishing between different PUFs due to random variations, are sensitive to attacks, and lack robustness against fault injection and surface bulk attacks, while existing technologies are difficult to produce and have penalizing surface bulk.
Innovation Solution
A physical unclonable function device is designed with a first module generating an initial data group and management means to authorize limited deliveries of a unique unpredictable code, using non-volatile memory cells with buried selection transistors and depletion-type state transistors, and a second module generating an additional unpredictable code for unlimited use, enhancing security and robustness against attacks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If physical unclonable functions are implemented using existing technologies, then unique unpredictable codes can be generated, but the devices are sensitive to attacks and lack robustness against fault injection and surface bulk attacks
Solution Approach 1:
The PUF device is divided into multiple independent memory cells with individual selection transistors and state transistors. Each cell contributes to the unique code generation, and the segmented architecture prevents single-point failures and makes fault injection attacks more difficult as each segment operates independently with its own random physical characteristics.
Solution Approach 2:
The patent implements local quality variations by creating random physical features at the transistor level within each memory cell. The selection transistors and state transistors have locally varied physical properties (threshold voltages, channel dimensions) that are unique to each cell, providing localized randomness that enhances security robustness while maintaining immunity to global attacks.
2Reliability
If PUF structures are designed to enhance security against attacks, then reliability improves, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The memory cell structure serves multiple functions simultaneously: it stores data, generates unique random codes through physical variations, and provides security against attacks. The selection transistor and state transistor configuration is universally applicable across all memory cells in the array, simplifying manufacturing while maintaining high security robustness through the collective randomness of many identical structures with local variations.
Solution Approach 2:
The patent exploits natural parameter variations in transistor physical properties (threshold voltage, channel width, length) during manufacturing to generate unique codes. By designing the system to rely on these inherent parameter changes rather than adding complex security structures, the solution achieves high reliability without proportionally increasing device complexity.
3Reliability
If PUF devices are designed with enhanced security features, then resistance to attacks improves, but surface bulk increases
Solution Approach 1:
The patent uses the natural copy variations that occur during manufacturing of identical transistor structures to generate unique security codes. Instead of adding extra security components, it exploits the inherent differences in copied structures (transistor parameters) across the memory array, achieving high attack resistance with minimal surface bulk overhead.
Solution Approach 2:
The manufacturing process itself generates the security features through natural physical variations in transistor parameters. The PUF device serves itself by using the unavoidable manufacturing imperfections as its security mechanism, eliminating the need for additional security components that would increase surface bulk.
4Reliability
If limited-use codes are generated with predefined delivery authorization, then security is enhanced, but the device becomes inoperative after reaching the usage limit
Solution Approach 1:
The patent implements preliminary action by pre-authorizing a specific number of code deliveries during device manufacturing or initialization. The management means records the authorized usage count in advance, and automatically stops code generation after the predefined limit is reached, ensuring security without requiring continuous external monitoring or intervention.
Data Source
AI summary
In an embodiment an integrated device includes a first physical unclonable function module configured to generate an initial data group and management module configured to generate an output data group from at least the initial data group, authorize only D successive deliveries of the output data group on a first output interface of the device, D being a non-zero positive integer, and prevent any new generation of the output data group.