PUF Memory Cell Architecture for Limited-Use Secret Key Delivery
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Solution Overview
Problem
Existing physically unclonable function (PUF) structures in integrated circuits face challenges in securely generating unique, non-predictable codes that are difficult to clone and extract, while being susceptible to attacks and requiring additional manufacturing steps, with a need for enhanced security and distinguishability.
Innovation Solution
A physically unclonable function device is proposed, featuring a first module generating initial data and management means to authorize limited deliveries of a unique code, combined with a second module generating an unlimited-use code, using non-volatile memory cells with buried selection transistors and differential threshold voltage readings to enhance security and robustness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If prior art PUF devices are implemented using random-access or non-volatile memories, ring oscillators, or specific logic circuits, then unique unpredictable codes can be generated, but the devices are more easily detectable within the integrated circuit or susceptible to fault injection attacks
Solution Approach 1:
The patent introduces an intermediary mechanism (the PUF device with specific memory cell architecture) that mediates between the need for unique code generation and security protection. The buried selection transistor acts as an intermediary element that makes the PUF structure less detectable and more resistant to attacks while still enabling code generation.
Solution Approach 2:
The patent applies local quality by modifying specific local characteristics of the memory cell structure (buried selection transistor, depletion-type state transistor with floating gate) to enhance security properties without changing the overall PUF functionality. This localized structural modification improves security while maintaining code generation capability.
2Reliability
If prior art PUF devices are implemented using random-access or non-volatile memories, ring oscillators, or specific logic circuits, then unique unpredictable codes can be generated, but the surface footprint is penalized
Solution Approach 1:
The patent uses local quality by implementing a specific memory cell structure with buried selection transistor and depletion-type state transistor. This localized structural optimization achieves better security properties and reduced footprint compared to conventional PUF implementations.
Solution Approach 2:
The patent merges multiple functions into a single memory cell structure that simultaneously provides PUF functionality, security features, and compact integration. The combination of buried selection transistor and depletion-type state transistor creates a multi-functional unit that reduces overall surface footprint.
3Reliability
If management means are configured to prevent any further generation of the output data group by preventing any further generation of the initial data group, then limited-use security is enhanced, but device complexity increases
Solution Approach 1:
The patent applies preliminary action by pre-configuring the memory cell structure and management means to automatically prevent further generation of initial data groups after a predetermined number of uses. The depletion-type state transistor and its threshold voltage characteristics are pre-designed to enforce use limitations without requiring complex external management logic.
Solution Approach 2:
The PUF device performs self-service by using its own internal structure (depletion-type state transistor with floating gate) to automatically limit the number of times initial data groups can be generated. The device self-regulates its usage without requiring complex external management, thereby enhancing security while maintaining relatively simple device architecture.
Data Source
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AI summary
Integrated Physically Non-Clonable Function Device, comprising a first Physically Non-Clonable Function Module (MPF1), internal to the device (DIS), configured to generate an initial data group (RD2) and management means (MGST), internal to the device, at least configured to -generate an output data group (HUK2) from at least the initial data group (RD2), -allow only D successive deliveries of the output data group (HUK2) on a first output interface (INST1) of the device, D being a non-zero positive integer, and -prevent any further generation of the output data group (HUK2).