PUF Cell Noise Injection for Stable Signature Characterization
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Solution Overview
Problem
Physically unclonable function (PUF) generators in integrated circuits face instability due to dynamic noise, leading to unpredictable behavior and the need for a method to quickly evaluate and filter out unstable bit cells to produce reliable PUF signatures.
Innovation Solution
A PUF generator system that includes a PUF cell array, a noise injector, and a control circuit to introduce 'stressed' operation conditions, allowing for the identification and filtering of unstable bit cells by comparing initial and noise-injected PUF outputs, and generating a stable PUF signature based on stable bit cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If noise injection is applied to evaluate bit cell stability, then reliability of PUF signature is improved, but device complexity increases
Solution Approach 1:
A delay circuit is introduced as an intermediary component to generate controlled delay signals that modulate the read operation timing. This mediator enables noise injection without directly modifying the bit cell structure, thereby evaluating stability while maintaining relatively simple circuit architecture.
Solution Approach 2:
The patent changes the timing parameter by introducing variable delay signals to the read operation. By adjusting the delay amount, the system can control when the read operation occurs relative to the metastable state, effectively injecting noise to test bit cell stability without adding complex hardware.
2Reliability
If multiple read operations with delay are performed to filter unstable bit cells, then PUF signature uniqueness is improved, but loss of time increases
Solution Approach 1:
The system performs preliminary evaluation by conducting multiple read operations with varying delays before final PUF signature generation. This preliminary filtering action identifies and eliminates unstable bit cells in advance, ensuring uniqueness while optimizing the timing to minimize overall evaluation time.
Solution Approach 2:
The patent applies partial action by performing a limited number of read operations with delay rather than exhaustive testing. This approach filters out clearly unstable bit cells through controlled sampling, achieving sufficient uniqueness without the time cost of complete characterization of all bit cells.
Data Source
AI summary
Disclosed is a physical unclonable function generator circuit and method. In one embodiment, physical unclonable function (PUF) generator includes: a PUF cell array that comprises a plurality of bit cells, wherein each of the plurality of bit cells comprises at least two access transistors, at least one enable transistor, and at least two storage nodes, wherein the at least two storage nodes are pre-configured with substantially the same voltages allowing each of the plurality of bit cells having a first metastable logical state; a PUF control circuit coupled to the PUF cell array, wherein the PUF control circuit is configured to access the plurality of bit cells to determine second logical states by turning on the at least one enable transistor and turning off the at least two access transistors of each of the plurality of bit cells, and based on the second logical states of the plurality of bit cells, to generate a PUF output; and a noise injector coupled to the PUF control circuit and the PUF cell array, wherein the noise injector is configured to create stressed operation conditions to evaluate stability of the plurality of bit cells.