PUF Generator Reset Circuit Against Cell Retention Attacks
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Solution Overview
Problem
Existing methods for preventing cell retention failure attacks in physically unclonable function (PUF) generators, such as SRAM-based PUFs, are either costly, increase boot time, or require complex cryptographic primitives that exceed the capabilities of resource-constrained devices.
Innovation Solution
A novel circuit design for a PUF generator that includes a PUF cell array, a PUF control circuit, and a reset circuit, which detects supply voltage tempering events and resets bit cells to their initial logical states, preventing cell retention failure attacks by using a memory cell array with an additional path for resetting cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a separate SRAM block is used for building the PUF, then security against cell retention failure attacks is improved, but implementation cost and device complexity significantly increase
Solution Approach 1:
The patent merges the PUF generation function with the existing memory structure by adding a reset circuit to the memory cell array. This allows the same memory cells to serve both as storage and as PUF elements, eliminating the need for a separate dedicated PUF SRAM block while maintaining security against cell retention failure attacks.
Solution Approach 2:
The memory cell array is designed to serve multiple functions: normal data storage and PUF generation. By incorporating a reset circuit that can force cells to specific initial states, the same hardware structure performs both storage and security functions, reducing overall device complexity while improving reliability.
2Reliability
If the device waits for stored value decay before reading data after power tempering detection, then security is improved, but boot time significantly increases
Solution Approach 1:
The reset circuit is pre-configured to immediately reset memory cells to their initial logical states upon detecting power tempering events. This preliminary setup eliminates the need to wait for natural value decay, as the system proactively restores cells to known states, maintaining security while reducing boot time.
Solution Approach 2:
The system implements a feedback mechanism where the reset circuit continuously monitors for power tempering conditions and automatically triggers cell reset operations. This real-time detection and response mechanism ensures security without requiring time-consuming waiting periods, as the system actively manages cell states based on detected conditions.
3Reliability
If cryptographic primitives are used to obfuscate PUF response bits, then security is improved, but device complexity exceeds capabilities of resource-constrained devices
Solution Approach 1:
The patent extracts the security mechanism from complex cryptographic algorithms and implements it directly at the hardware level through the reset circuit. By removing the need for software-based cryptographic primitives and implementing security logic in the memory cell reset mechanism, the solution achieves strong security while remaining compatible with resource-constrained devices.
Solution Approach 2:
The memory cells themselves provide the security function through their physical properties and the reset circuit's ability to control their initial states. The system uses the inherent characteristics of the memory cells combined with the reset mechanism, eliminating the need for external cryptographic processing and keeping the solution simple enough for resource-constrained devices.
4Ease of manufacture
If existing memory is used for generating PUF, then implementation cost is reduced, but vulnerability to cell retention failure attacks increases
Solution Approach 1:
The reset circuit provides a protective mechanism that prevents cell retention failure attacks before they can compromise security. By preparing the reset functionality in advance and integrating it with the memory structure, the system maintains the cost benefits of using existing memory while cushioning against the harmful effects of retention failures through automatic cell state restoration.
Data Source
AI summary
Methods and apparatus for protecting a physical unclonable function (PUF) generator are disclosed. In one example, a PUF generator is disclosed. The PUF generator includes a PUF cell array, a PUF control circuit and a reset circuit. The PUF cell array comprises a plurality of bit cells. Each of the plurality of bit cells is configurable into at least two different stable states. The PUF control circuit is coupled to the PUF cell array and is configured to access each of the plurality of bit cells to determine one of the at least two different stable states upon a power-up of the plurality of bit cells, and generate a PUF signature based on the determined stable states of the plurality of bit cells. The reset circuit is coupled to the PUF cell array and is configured to set the plurality of bit cells to represent their initialization data based on an indication of a voltage tempering event of a supply voltage of the PUF cell array.