PUF Response Generation With Symmetric Bit Filtering for Entropy
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Solution Overview
Problem
Existing PUF technologies reduce entropy by using bit selection methods that ensure stability but result in an imbalance between 0 and 1, making the PUF output easier to predict and compromising security.
Innovation Solution
A method for generating PUF responses by discarding output bits where |υ−T|<δυ or |υ+T|<δυ, and swapping comparator inputs to maintain symmetry, ensuring equal '0' and '1' counts and maximizing entropy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If bit selection methods are used to ensure PUF output stability, then reliability is improved, but entropy is reduced due to imbalance between 0 and 1 outputs
Solution Approach 1:
The patent applies asymmetry by introducing a non-zero current offset T in the comparator, which breaks the symmetry of the comparison threshold. This allows the system to compensate for manufacturing variations and environmental effects, improving stability while maintaining entropy through the asymmetric thresholding mechanism that balances 0 and 1 outputs.
Solution Approach 2:
The patent changes the comparator threshold parameter from zero to a non-zero offset T. This parameter change enables the system to adapt to process variations and maintain stable PUF outputs while preserving the balance between 0 and 1 outputs, thereby maintaining maximum entropy.
2Reliability
If a non-zero current offset T is introduced in the comparator, then PUF output stability is improved, but device complexity increases
Solution Approach 1:
The patent merges the offset generation function with the existing comparator structure. The non-zero current offset T is generated and applied within the comparator circuit itself, combining multiple functions (comparison and offset compensation) into a single integrated component, thereby avoiding additional complex circuitry.
3Reliability
If output bits with small |υ−T| values are discarded, then PUF response stability is improved, but productivity decreases due to bit loss
Solution Approach 1:
The patent implements a dynamic bit selection process where the threshold for discarding bits is adaptively determined based on the distribution of |υ−T| values. The system dynamically adjusts which bits to keep or discard based on their contribution to stability, optimizing the balance between reliability and productivity.
Solution Approach 2:
The patent applies partial action by selectively discarding only the most problematic bits (those with very small |υ−T| values) while keeping bits with moderate values. This partial filtering approach removes just enough unstable bits to improve reliability without excessively reducing the number of available output bits, thereby maintaining productivity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method ensures stability and maximizes entropy of PUF responses, making them harder to predict and thus enhancing security.
Implementation Method 1
performing an analog to digital conversion of said analog differential value υ−T
Data Source
AI summary
Provided is a method for generating a physical unclonable function PUF response by a PUF circuit of an electronic device, said PUF circuit comprising pairs of electronic components called PUF primitives implementing said physical unclonable function, by obtaining a challenge (S1), generating PUF output bits (S2) by applying said physical unclonable function to said obtained challenge, and generating said PUF response (S3) from said generated PUF output bits verifying υ>δυ+|T| or υ<−δυ−|T| with δυ a predetermined threshold. In some embodiments it maximizes a PUF response entropy based only on the analog differential values generated by the comparators of the electronic device. Other embodiments disclosed.