PUF Security Key Generation Using Parallel Error Correction

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Solution Overview

Problem

Semiconductor devices with physically unclonable functions (PUF) face increased data output errors due to process variations, leading to higher bit error rates and longer error correction times, which hinder efficient security key generation and encryption processes.

Innovation Solution

A semiconductor device architecture that includes a PUF cell array, a non-volatile memory for storing marking and mask bits, and decoding units for error correction, allowing concurrent processing to extract, unmask, and compress bits to generate a security key, reducing the area and operating time required for key generation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If error correction operations are performed to reduce bit error rate, then data reliability is improved, but operating time increases

Engineering Contradiction:

Improvebit error rateVSAvoiderror correction time

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The error correction process is divided into multiple stages: bit-level error correction using first mask bits and block-level error correction using second mask bits. This segmentation allows parallel processing of different error correction operations, reducing total processing time while maintaining comprehensive error correction capability.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The marking bits, first mask bits, and second mask bits are pre-calculated and stored in non-volatile memory during device initialization. This preliminary action eliminates the need to recalculate these values during subsequent key generation operations, significantly reducing processing time while ensuring accurate error correction.

Inventive Principle:

Principle #10Preliminary action

2Reliability

If data output size increases to enhance security, then encryption strength is improved, but error correction area increases

Engineering Contradiction:

Improvesecurity key strengthVSAvoiderror correction circuit area

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

The non-volatile memory serves multiple functions: storing marking bits for valid bit identification, storing first mask bits for bit-level error correction, and storing second mask bits for block-level error correction. This multi-functionality reduces the total area required compared to separate dedicated storage for each function.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent transitions from sequential error correction processing to parallel processing by utilizing multiple mask bit levels (bit-level and block-level) that operate simultaneously. This dimensional change in processing architecture reduces the computational area needed while maintaining comprehensive error correction for enhanced security.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

3Productivity

If concurrent processing units are added to reduce operating time, then productivity is improved, but device complexity increases

Engineering Contradiction:

Improvekey generation speedVSAvoidprocessing unit structure

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

Multiple error correction functions (bit-level and block-level processing) are merged into a unified processing architecture that operates concurrently. The extraction unit, unmasking unit, bit decoding unit, and block decoding unit work in parallel, combining their computational power to accelerate key generation without requiring separate independent systems.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The non-volatile memory acts as an intermediary that stores pre-computed mask bits and marking bits, enabling fast read-access during concurrent processing. This intermediary storage mechanism allows multiple processing units to operate simultaneously without data conflicts, improving productivity while keeping the overall structure manageable.

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS10476681B2Semiconductor device generating security key, method of generating security key, and method of enrolling security key

Publication Date: 2019.11.12 SAMSUNG ELECTRONICS CO LTD

AI summary

A semiconductor device includes a physical unclonable function (PUF) cell array that includes PUF cells outputting first bits; a non-volatile memory that stores marking bits indicating whether the first bits are valid, first mask bits generated by masking second bits depending on parity of the second bits, and second mask bits generated by masking helper bits of the second bits, the second bits are valid bits from the first bits; an extracting unit that extracts the second bits from the first bits using the marking bits; an unmasking unit that unmasks the second bits using the first mask bits while receiving the second bits to provide the third bits; a bit decoding unit that compresses the third bits to fourth bits while receiving the third bits; and a block decoding unit that generates a security key by decoding the fourth bits and the second mask bits.