Pulse Output Circuit Layout for Batch Scan Signal Driving
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Solution Overview
Problem
Existing display devices face challenges in reducing flicker on screens and minimizing data writing periods while also reducing power consumption, particularly due to the long data writing periods associated with sequential output of scan signals to multiple scan lines.
Innovation Solution
A pulse output circuit is designed with a specific configuration of transistors and power source lines, allowing for the sequential delay of clock signals by ¼ period, enabling batch output of display scan signals to multiple scan lines, thereby reducing data writing periods and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If sequential output of scan signals to multiple scan lines is used, then the driver circuit can be implemented with simple circuitry, but the data writing period becomes long
Solution Approach 1:
The driver circuit is divided into multiple pulse output circuits, each responsible for driving a specific scan line. Each pulse output circuit includes transistors configured to generate and output scan signals independently, allowing parallel operation across multiple scan lines while maintaining manageable circuit complexity within each segment.
Solution Approach 2:
Multiple pulse output circuits are combined to operate simultaneously on different scan lines, transforming the sequential output process into a parallel batch output process. This merging of multiple independent circuits working in parallel reduces the overall data writing period while keeping individual circuit designs simple.
2Device complexity
If sequential output of scan signals to multiple scan lines is used, then the driver circuit structure is simplified, but power consumption increases
Solution Approach 1:
The pulse output circuits operate in periodic cycles, generating scan signals only when needed for each scan line. This periodic operation allows the circuits to remain in low-power states between activations, reducing overall power consumption compared to continuous operation, while the parallel structure reduces the total time active circuits need to operate.
3Loss of time
If batch output of scan signals to multiple scan lines is implemented, then data writing period is reduced, but circuit complexity increases
Solution Approach 1:
The complex task of batch output to multiple scan lines is segmented into multiple independent pulse output circuits, each handling one scan line. This segmentation allows the system to achieve parallel batch output functionality while keeping each individual circuit unit relatively simple and manageable.
4Use of energy by stationary object
If batch output of scan signals is implemented, then power consumption is reduced, but flicker on screen may increase
Solution Approach 1:
The pulse output circuits generate scan signals in periodic cycles that are synchronized across multiple scan lines. This periodic batch output maintains consistent timing patterns that reduce flicker perception, while the parallel operation reduces the total duration of active signal generation, thereby reducing power consumption.
Data Source
AI summary
In a pulse output circuit in a shift register, a power source line which is connected to a transistor in an output portion connected to a pulse output circuit at the next stage is set to a low-potential drive voltage, and a power source line which is connected to a transistor in an output portion connected to a scan signal line is set to a variable potential drive voltage. The variable potential drive voltage is the low-potential drive voltage in a normal mode, and can be either a high-potential drive voltage or the low-potential drive voltage in a batch mode. In the batch mode, display scan signals can be output to a plurality of scan signal lines at the same timing in a batch.