Pulse-Coded Capacitive Digital Isolator for Low Quiescent Current

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Solution Overview

Problem

Capacitive digital isolators using On/Off Key (OOK) modulation technology have high power consumption due to high quiescent current, especially when the input signal has a 50% duty cycle and medium or low frequency, leading to increased power waste and reduced standby time in battery-powered systems.

Innovation Solution

A capacitive digital isolator circuit employing Pulse-Coding technology with an edge Pulse-Coding modulator circuit, ultra-low power consumption high-speed comparator, timer, pulse counter, and adaptive working current, which generates differential modulated signals with varying high-frequency pulses based on input signal edges, and automatically shuts down to minimize quiescent current consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If OOK modulation technology is used in capacitive digital isolators, then high reliability and stability are achieved, but power consumption becomes excessively high due to high quiescent current

Engineering Contradiction:
ImprovereliabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies periodic action by using pulse-coded modulation where the isolator transmits signals in periodic pulse trains rather than continuous OOK modulation. The high-frequency pulse generator generates periodic pulses that are modulated by the input signal, creating a periodic transmission pattern that reduces average power consumption while maintaining signal integrity and reliability.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent implements dynamics by making the working current adaptive rather than fixed. The ultra-low power consumption high-speed comparator dynamically adjusts its working current based on signal activity detection, consuming high current only when signals are being transmitted and switching to ultra-low quiescent current mode during idle periods, thus resolving the contradiction between reliability and power consumption.

Inventive Principle:
Principle #15Dynamics

2Productivity

If OOK modulation is used with 50% duty cycle input signals, then signal transmission is maintained, but power consumption increases significantly due to continuous carrier operation

Engineering Contradiction:
Improvesignal transmissionVSAvoidpower waste
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The patent replaces continuous carrier operation with periodic pulse transmission. The high-frequency pulse generator produces periodic pulse trains that are gated by the modulator based on input signal edges, creating periodic transmission bursts instead of continuous carriers. This reduces power waste while maintaining signal transmission capability through edge-triggered pulse encoding.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent extracts only the essential signaling moments from continuous transmission by using edge-triggered pulse generation. Instead of maintaining continuous carriers for 50% duty cycle signals, the system extracts timing information from signal edges and transmits only during these critical moments using periodic pulse bursts, eliminating power waste during non-critical periods while preserving transmission productivity.

Inventive Principle:
Principle #2Taking out (Extraction)

3Measurement precision

If OOK modulation operates at medium or low frequencies with 50% duty cycle, then signal representation is accurate, but battery standby time is reduced due to sustained high power consumption

Engineering Contradiction:
Improvesignal representationVSAvoidbattery standby time
Core Design Contradiction:
Measurement precisionVSDuration of action of moving object

Solution Approach 1:

The patent applies dynamics by implementing adaptive current control in the ultra-low power consumption high-speed comparator. The comparator dynamically switches between high-current operation mode (when signal edges are detected and transmission is active) and ultra-low quiescent current mode (during idle periods), maintaining accurate signal representation during active periods while extending battery standby time during idle periods through dramatic current reduction.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent uses periodic action through pulse-coded modulation where signal information is encoded in periodic pulse trains generated only during active transmission periods. This allows accurate signal representation during transmission while enabling the system to enter low-power states between periodic transmission bursts, thereby extending battery standby time without sacrificing measurement precision during active operation.

Inventive Principle:
Principle #19Periodic action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution significantly reduces power consumption by adapting current usage based on signal activity, achieving ultra-low quiescent current operation and extending battery life in battery-powered systems while maintaining high-speed signal delivery and reliability.

Implementation Method 1

Capacitive digital isolators are capacitive isolators using SiO2 as the isolation medium

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

Capacitive digital isolators are capacitive isolators using SiO2 as the isolation medium

Methodology Applied
Scientific EffectDielectric: Dielectric

Data Source

PatentUS11418179B2Capacitive digital isolator circuit with ultra-low power consumption based on pulse-coding
Publication Date: 2022.08.16 SHANGHAI CHIPANALOG MICROELECTRONICS LTD
  • US11418179B2 patent drawing
  • US11418179B2 patent drawing
  • US11418179B2 patent drawing

AI summary

A capacitive digital isolator circuit includes: a signal emitting module; a signal receiving module; and a capacitive isolation module. The signal emitting module includes an edge Pulse-Coding modulator circuit, which modulates an input signal to generate a pair of differential modulated signals based on the input signal and transmits the pair of differential modulated signals to the signal receiving module. Each of the pair of differential modulated signals has twelve high-frequency pulses when the input signal has a rising edge and has six high-frequency pulses when the input signal has a falling edge. The signal receiving module includes an ultra-low power consumption high-speed comparator, a timer and a pulse counter. An output signal of the pulse counter has a rising edge when the pulse number of the comparator output signal is larger than nine and a falling edge when the pulse number is equal to or smaller than nine.