Asynchronous Pulse Counter With Synchronized Readout for Audio Signals
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current audio file processing circuits are inefficient in counting pulses from audio signals, particularly at low frequencies, and lack effective mechanisms for operating at low frequency bases.
Innovation Solution
A pulse counter circuit is developed, comprising an asynchronous counter synchronized by a clock signal, with a flip-flop for reading the counter value during specific synchronization phases, and integrated with a neural network for processing audio data, operating at frequencies between 30-40 kHz.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If synchronous counting is used for pulse counting in audio file processing, then measurement precision is improved, but device complexity and energy consumption increase
Solution Approach 1:
The patent extracts the synchronization function from the counting operation itself, using a separate synchronization circuit that triggers read operations at appropriate intervals. This allows the counter to operate asynchronously with simple logic, while precision is maintained through synchronized sampling of the counter value.
Solution Approach 2:
The patent introduces a synchronization circuit as an intermediary between the asynchronous counter and the digital processing unit. This mediator triggers read operations at appropriate intervals, ensuring accurate capture of pulse counts without requiring the counter itself to be synchronized, thus maintaining simplicity while achieving precision.
2Productivity
If high frequency operation is used for pulse counting, then productivity is improved, but use of energy increases
Solution Approach 1:
The patent employs periodic synchronization triggers that activate at appropriate intervals to read the counter value, rather than continuous high-frequency operation. The counter operates continuously but with simple logic, and the synchronization circuit periodically samples the value, achieving accurate pulse counting at lower average energy consumption.
Solution Approach 2:
The asynchronous counter operates autonomously with simple increment logic, serving itself without requiring complex synchronization mechanisms. The counter maintains accurate pulse counts through its inherent design, while the synchronization circuit only needs to trigger periodic read operations, reducing overall energy consumption compared to fully synchronous high-frequency operation.
3Use of energy by moving object
If asynchronous counting is used for low frequency operation, then use of energy is reduced, but measurement precision deteriorates
Solution Approach 1:
The synchronization circuit provides feedback timing signals that trigger read operations at appropriate intervals based on the audio signal characteristics. This feedback mechanism ensures that pulse counts are captured at optimal moments, maintaining measurement precision even though the counter operates asynchronously with simpler, lower-energy logic.
Solution Approach 2:
The synchronization circuit acts as an intermediary that bridges the asynchronous counter operation with the requirements for accurate measurement. It triggers read operations at appropriate intervals, ensuring that pulse counts are captured with sufficient precision for audio processing applications while allowing the counter to operate with simple, energy-efficient logic.
4Measurement precision
If complex synchronization mechanisms are implemented, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The patent extracts the synchronization function into a separate, simple trigger circuit that operates independently from the counter logic. This synchronization circuit uses basic logic to generate periodic read triggers based on audio signal thresholds, achieving adequate precision without complex synchronization mechanisms embedded in the counter itself.
Data Source
Figure 1~2
Figure 3
AI summary
This description relates to a pulse counter (200) comprising an asynchronous counter (201) and a circuit (205) configured to trigger a read operation of the value of said asynchronous counter, said circuit (205) being synchronized by a clock signal.