Time-to-Digital Converter Using Pulse Counting and Short Delay Lines
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Solution Overview
Problem
Conventional time-to-digital converters require extensive circuitry and long delay lines to maintain temporal resolution, leading to space and heat management issues, especially in large-scale applications like particle detectors, where many channels need to measure time simultaneously.
Innovation Solution
The method involves feeding a sequence of level changes into a delay circuit, where each level change is counted by an exit counter, allowing for a shorter tapped delay line and reducing the total delay time to be less than the system clock period, enabling precise time measurement with less equipment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional time-to-digital converters use long delay lines to maintain temporal resolution, then measurement precision is improved, but device complexity and space requirements increase
Solution Approach 1:
The patent applies periodic action by using a pulse generator to create a periodic sequence of level changes that are fed into the delay circuit. This periodic input signal allows the system to measure time intervals by counting the number of periods that fit within the measured interval, enabling precise time measurement without requiring extremely long delay lines. The periodic nature of the input signal creates a reference rhythm that simplifies the measurement process and reduces the required delay circuit length.
Solution Approach 2:
The patent replaces the traditional mechanical/electronic delay line measurement approach with a counting-based system. Instead of measuring time by the physical length of delay lines, the system uses digital counters to count the number of periodic signal cycles that occur during the time interval being measured. This substitution of mechanical delay measurement with digital counting reduces device complexity while maintaining measurement precision.
2Measurement precision
If conventional time-to-digital converters use long delay lines to maintain temporal resolution, then measurement precision is improved, but heat output increases
Solution Approach 1:
By using periodic pulse sequences instead of continuous signals through long delay lines, the system reduces the active time components are spending in high-power states. The periodic nature allows for efficient duty cycling where components are actively switching only during the pulse periods rather than continuously, thereby reducing overall heat generation while maintaining the ability to measure time intervals with high precision.
3Measurement precision
If conventional time-to-digital converters use extensive circuitry to maintain temporal resolution, then measurement precision is improved, but the number of measurement channels that can be implemented decreases
Solution Approach 1:
The patent applies segmentation by dividing the time measurement function into separate modular components: a shared pulse generator that creates periodic signals, multiple independent delay circuits that can be selectively activated, and counters that can be assigned to different measurement channels. This modular segmentation allows multiple measurement channels to share common resources while maintaining independent measurement capabilities, thereby increasing the number of channels that can be implemented without sacrificing temporal resolution.
Solution Approach 2:
The patent implements universality by designing a system where a single pulse generator can serve multiple measurement channels simultaneously, and where the delay circuits and counters can be dynamically allocated to different channels as needed. This multi-functional design allows the same hardware resources to perform multiple measurement tasks, effectively increasing the number of measurement channels that can be supported by a given device without requiring proportional increases in overall circuitry.
Data Source
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AI summary
The invention relates to a method for time-to-digital conversion, by means of which the time at which a signal arrives at a measuring device is determined, and to a time-to-digital converter designed to carry out the method. The signal (108) arriving at the measuring device is fed into a delay circuit (100) composed of a plurality of delay elements (101) connected in series, which have an input (102) and an output (103), the output (103) of one of the delay elements (101) being connected to the input (102) of the following delay element (101), and passes through the delay circuit (100), the fed signal (108) causing a level change, and the outputs (103) of all the delay elements (101) also being connected to inputs of respective registers (105) for read-out. According to the invention, the signal (108) is fed into the delay circuit (100) as a sequence of level changes by means of a pulse generator (130) and the exiting of each level change at the end of the delay elements (101) connected in series is counted in an exit counter (150).