Dual-Branch Pulse Counting Circuit for Predictable Random Oscillations

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Solution Overview

Problem

Existing random number generators and physical unclonable function circuits face challenges in generating reliable random numbers and unique identifiers due to unpredictable stopping conditions, which affect the randomness and reproducibility of generated numbers.

Innovation Solution

A circuit design incorporating symmetrical and asymmetrical delay lines with NAND-type gates and multiplexers, allowing for controlled oscillation generation and counting, ensuring consistent rise and fall times, and using a counter to select the appropriate count based on pulse signals, thereby enhancing the predictability and randomness of generated numbers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If delay lines are used to generate oscillations for random number generation, then randomness is improved, but predictability of stopping conditions deteriorates

Engineering Contradiction:
ImproverandomnessVSAvoidpredictability of stopping conditions
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The circuit is divided into two separate branches (first branch with first delay line and first asymmetrical delay element, second branch with second delay line and second asymmetrical delay element), each contributing to the overall oscillation behavior. This segmentation allows independent control and characterization of each branch's delay characteristics, improving predictability while maintaining randomness through their combined asymmetric behavior.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Asymmetrical delay elements are intentionally introduced in both branches to create unpredictable oscillation patterns. The first asymmetrical delay element introduces a first asymmetrical delay and the second asymmetrical delay element introduces a second asymmetrical delay, ensuring that rise and fall times differ between branches. This controlled asymmetry generates randomness while the delays can be characterized and predicted within specified ranges.

Inventive Principle:
Principle #4Asymmetry

2Stability of the object's composition

If symmetrical delay lines are used, then rise and fall times are consistent, but the ability to generate unpredictable oscillations deteriorates

Engineering Contradiction:
Improveconsistency of rise and fall timesVSAvoidunpredictability of oscillations
Core Design Contradiction:
Stability of the object's compositionVSReliability

Solution Approach 1:

Different local characteristics are assigned to different parts of the circuit. The delay lines provide symmetrical, consistent delays with matched rise and fall times, while the asymmetrical delay elements introduce localized unpredictability. This local differentiation allows the system to maintain overall stability through the symmetrical components while generating unpredictability through the asymmetrical components.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent combines symmetrical delay lines and asymmetrical delay elements in the same circuit branches. The symmetrical delay lines ensure consistent timing characteristics, while the asymmetrical delay elements introduce variability. By merging these opposing characteristics, the circuit achieves both predictability (through characterizable delays) and randomness (through asymmetric behavior).

Inventive Principle:
Principle #5Merging (Combining)

3Ease of manufacture

If standard electronic technology cells are used, then manufacturing compatibility is improved, but the precision of random number generation deteriorates

Engineering Contradiction:
Improvecompatibility with standard technologyVSAvoidprecision of random number generation
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent specifies delay characteristics in terms of parameter ranges (first delay, second delay, first asymmetrical delay, second asymmetrical delay) that can be achieved through standard electronic technology. By defining the system in terms of controllable parameters rather than requiring exotic components, the invention maintains compatibility with standard manufacturing while achieving sufficient precision for random number generation through careful parameter selection and characterization.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10243543B2Pulse counting circuit
Publication Date: 2019.03.26 STMICROELECTRONICS (ROUSSET) SAS
  • US10243543B2 patent drawing
  • US10243543B2 patent drawing
  • US10243543B2 patent drawing

AI summary

A pulse counting circuit receives pulses supplied by a source circuit having at least two inverted pulse signal supply terminals. The circuit includes a first counter to count pulses of a first pulse signal and supply a first count and a second counter to count pulses of a second pulse signal and supply a second count. A selection circuit selects one of the first and second counts.