Pulse Delay ADC Timing Compensation for Temperature Stability
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Solution Overview
Problem
Conventional analog to digital converters with pulse delay circuits experience significant temperature-dependent fluctuations in conversion data due to temperature variations affecting the delay time of delay units, making it difficult to maintain consistent input-output characteristics across different temperatures.
Innovation Solution
The proposed analog to digital converter incorporates a first pulse delay circuit with a multi-stage delay unit and a timing generation circuit that adjusts the measurement period based on temperature, ensuring the same AD conversion data is produced regardless of temperature changes, and includes a calibration circuit to further reduce temperature-related errors by detecting the number of delay units and correlating it with temperature data.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a pulse delay circuit with multi-stage delay units is used for analog to digital conversion, then fast conversion speed is achieved, but temperature-dependent fluctuations in conversion data occur due to temperature variations affecting delay time
Solution Approach 1:
The patent changes the measurement period parameter dynamically based on temperature. A timing generation circuit generates an end signal at a timing that corresponds to a specified voltage value, adjusting the measurement period according to temperature conditions. This compensates for temperature-induced delay time variations in the pulse delay circuit, maintaining accurate AD conversion results across different temperatures while preserving fast conversion speed
Solution Approach 2:
The patent implements a feedback mechanism where temperature data is detected and used to adjust the measurement period. The system measures the actual temperature, compares it with reference temperature data, and modifies the end signal timing accordingly. This closed-loop feedback approach compensates for temperature effects on delay units, ensuring stable conversion results without sacrificing the inherent speed advantage of the pulse delay circuit
2Device complexity
If the measurement period is fixed for AD conversion, then simple timing control is achieved, but temperature variations cause fluctuations in conversion data due to delay time changes
Solution Approach 1:
The patent transitions from a fixed measurement period to a dynamic measurement period that adapts to temperature conditions. The timing generation circuit generates end signals with varying timings based on detected temperature, making the measurement period flexible rather than rigid. This dynamic adjustment compensates for temperature-induced delay variations while maintaining relatively simple circuit implementation through the use of existing delay units and control logic
3Device complexity
If delay units with temperature-dependent delay time are used, then the analog to digital converter structure is simple, but temperature compensation requires complex additional circuits
Solution Approach 1:
The patent makes existing delay units serve multiple functions: they perform both the primary AD conversion function and the temperature compensation function. The same pulse delay circuit that converts analog voltage to digital data also provides the temperature compensation mechanism through its temperature-dependent delay characteristics. This eliminates the need for separate compensation circuits, maintaining structural simplicity while effectively counteracting temperature effects
Solution Approach 2:
The temperature compensation mechanism utilizes the inherent temperature-dependent characteristics of the delay units themselves rather than requiring external compensation components. The system leverages the natural physical behavior of the existing circuit elements, allowing them to self-compensate for temperature effects through the timing generation circuit that adapts measurement period based on detected temperature conditions
Data Source
AI summary
An analog to digital converter includes: a first pulse delay circuit forming a multi-stage delay unit of which each delay unit have a pulse signal delayed with a delay time responding to an input voltage; a first encoding circuit that detects the number of delay units in the first pulse delay circuit through which the pulse signal passes during a predetermined measurement period, and outputs the AD conversion data based on the number of delay units; and a timing generation circuit which, in response to receiving the start signal, generates an end signal when the input voltage of the first pulse delay circuit is a specified voltage within an allowable input voltage range, in order to determine the measurement period which is a time required for the pulse signal to pass through a predetermined number of the delay units which is specified in advance.