Pulse Delay Circuit Back-Gate Control for Wider Time Range

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Solution Overview

Problem

Conventional pulse delay circuits face challenges in improving voltage resolution and measurement time range without increasing circuit size or requiring advanced semiconductor manufacturing technology, limiting their performance in A/D converters and time measurement circuits.

Innovation Solution

A pulse delay circuit driving method that controls the on-resistance of specific transistors by separately controlling the voltages of their terminals, allowing for increased delay time and improved voltage resolution without increasing circuit size, achieved by applying control signals to the back gate of transistors in the pulse delay circuit.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If the voltage level of the drive signal is decreased to increase delay time, then the delay time increases, but the on-resistance of transistors increases causing excessive delay and loss of control precision

Engineering Contradiction:

Improvedelay timeVSAvoidvoltage resolution

Core Design Contradiction:

Loss of timeVSMeasurement precision

Solution Approach 1:

The patent changes the electrical parameters of the transistor by applying a back gate voltage, which modifies the on-resistance independently of the drive signal voltage. This allows the delay time to be increased by lowering the drive signal voltage without the excessive on-resistance increase that would normally occur, thus resolving the contradiction between delay time and voltage resolution

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The back gate voltage serves as an intermediary control signal that mediates between the drive signal voltage and the transistor on-resistance. By controlling the back gate, the patent indirectly controls the on-resistance to achieve desired delay times while maintaining voltage resolution, avoiding the direct trade-off between these parameters

Inventive Principle:

Principle #24Intermediary (Mediator)

2Measurement precision

If the delay time is shortened to improve voltage resolution, then the voltage resolution improves, but the measurement time range decreases

Engineering Contradiction:

Improvevoltage resolutionVSAvoidmeasurement time range

Core Design Contradiction:

Measurement precisionVSDuration of action of moving object

Solution Approach 1:

The patent makes the delay time dynamically adjustable by controlling the back gate voltage, allowing the system to adapt the delay time to different measurement requirements. This dynamic control enables the system to achieve both high voltage resolution and extended measurement time range by optimizing delay time for each measurement condition

Inventive Principle:

Principle #15Dynamics

3Manufacturing precision

If advanced semiconductor manufacturing technology is used to improve performance, then the circuit performance improves, but the manufacturing complexity and cost increase

Engineering Contradiction:

Improvecircuit performanceVSAvoidmanufacturing complexity

Core Design Contradiction:

Manufacturing precisionVSEase of manufacture

Solution Approach 1:

Instead of relying on advanced manufacturing processes to improve circuit performance, the patent achieves performance enhancement by changing operational parameters - specifically applying a back gate voltage to modify transistor characteristics. This approach improves circuit performance while maintaining ease of manufacture using conventional semiconductor fabrication processes

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method enhances voltage resolution in A/D converters and widens the measurable time range in time measurement circuits without shortening delay unit time or increasing circuit size, allowing for more efficient data conversion and measurement without relying on advanced process technologies.

Implementation Method 1

a control signal is supplied to a control terminal provided in the pulse delay circuit, via the control terminal, and the back gate voltage of the specific transistor configuring the delay unit is controlled

Methodology Applied

Scientific EffectField effect transistor control: Conduction (electrical)

Data Source

PatentUS7741986B2Method for controlling delay time of pulse delay circuit and pulse delay circuit thereof

Publication Date: 2010.06.22 DENSO CORP

AI summary

An inverter circuit configuring a delay unit is a so-called CMOS transistor including a PMOS transistor and an NMOS transistor, of which respective gates are interconnected and respective drains are interconnected. The source and a back gate of the NMOS transistor are connected to the ground. The source of the PMOS transistor is connected to a positive drive terminal and controlled by an analog input signal. The back gate of the PMOS transistor is connected to a control terminal and controlled by a control signal.