Pulse Delay Circuit for Stable Edge Timing Across PVT Variation

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Solution Overview

Problem

Existing delay circuits experience significant variations in delay time due to changes in power supply voltage, operating temperature, and manufacturing process, affecting their performance.

Innovation Solution

A delay circuit comprising two units, where the first unit delays a rising or falling edge of a pulse signal, and the second unit further delays the output signal from the first unit, ensuring that the variation in delay time remains within a small range (e.g., 1%, 3%, or 5%) across different parameters, thereby stabilizing the output signal.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional delay circuit is used, then the delay time can be adjusted, but the delay time varies significantly with power supply voltage, temperature, and manufacturing process

Engineering Contradiction:
Improvedelay time stabilityVSAvoiddelay time variation
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent changes the operating parameters of the delay circuit by introducing a control signal that adjusts the switching thresholds of the threshold switches. By dynamically adjusting the threshold parameters based on environmental conditions (temperature, voltage, process variations), the circuit compensates for parameter drift and maintains stable delay time. The control signal modifies the gate voltages of the threshold switches, thereby changing their switching characteristics to counteract environmental variations.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If the delay circuit parameters are adjusted to compensate for environmental variations, then the delay time stability improves, but the circuit complexity increases

Engineering Contradiction:
Improvedelay time stabilityVSAvoidcircuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements a feedback mechanism where the control signal is generated based on the actual operating conditions of the delay circuit. The feedback loop monitors environmental parameters (such as temperature and voltage) and adjusts the switching thresholds accordingly. This feedback control enables the circuit to automatically compensate for environmental variations without requiring complex external control systems, thereby improving delay stability while keeping the circuit complexity manageable.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The control signal serves multiple functions simultaneously: it adjusts the switching thresholds of multiple threshold switches, compensates for various environmental variations (temperature, voltage, process), and maintains delay time stability across different operating conditions. This multi-functionality reduces the need for separate compensation circuits for each environmental factor, thereby simplifying the overall circuit structure while achieving comprehensive parameter stabilization.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentEP3998705B1Delay circuit and delay structure
Publication Date: 2024.07.10 CHANGXIN MEMORY TECH INC
  • EP3998705B1 patent drawingFigure 1~3
  • EP3998705B1 patent drawingFigure 4~7
  • EP3998705B1 patent drawingFigure 8~10

AI summary

The present disclosure provides a delay circuit and a delay structure. The circuit includes: a first delay unit configured to delay a rising edge and/or a falling edge of a pulse signal, where, an input terminal of the first delay unit receives the pulse signal, and an output terminal of the first delay unit outputs a first delay signal, and a second delay unit, configured to delay the first delay signal, where an input terminal of the second delay unit is connected to the output terminal of the first delay unit, and an output terminal of the second delay unit outputs a second delay signal. A delay time between a rising edge of the second delay signal and the rising edge of the pulse signal is denoted as a rising edge delay time; a delay time between a falling edge of the second delay signal and the falling edge of the pulse signal is denoted as a falling edge delay time; a variation value, varying with a first parameter, of the rising edge delay time and/or the falling edge delay time is within a first range, and the first parameter includes at least one of the following: manufacturing process, power supply voltage wave, or working temperate of the delay circuit.