Pulse Driven Power FET for GaN High-Side Drivers
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Solution Overview
Problem
Existing solutions for driving GaN power FETs in a floating high-side configuration require additional high-side driver ICs, leading to frequency limitations, high current consumption, propagation delays, increased PCB footprint, and cost, while lacking simplicity and reliability.
Innovation Solution
A power drive circuit with an integrated pulse detector, state storage device, and driver that receives pulse signals to generate control signals, enabling the GaN power switch to conduct or not conduct current between terminals, and includes an overcurrent protection circuit to manage voltage differences, all integrated on a single or multiple GaN dies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If additional high-side driver ICs are used to drive GaN power FETs in floating high-side configuration, then the device can be driven from low-side referenced PWM signal, but frequency limitations and propagation delay limitations occur
Solution Approach 1:
The patent integrates the pulse detector, state storage device, driver circuit, and power switch into a single monolithic GaN device. This merging eliminates the need for external high-side driver ICs and associated PCB components, thereby removing frequency and propagation delay limitations imposed by external components while maintaining floating high-side configuration capability.
Solution Approach 2:
The integrated GaN device performs multiple functions within a single component: pulse detection, state storage, driver amplification, and power switching. This multi-functionality replaces the need for separate high-side driver ICs and external components, achieving both adaptability for floating high-side configuration and high-speed operation without external dependencies.
2Adaptability or versatility
If additional high-side driver ICs are used, then voltage shifting across isolation barrier is achieved, but current consumption increases and PCB footprint area increases
Solution Approach 1:
The patent combines voltage shifting, pulse detection, state storage, and driver functions into a single integrated GaN device. This eliminates the need for external high-side driver ICs and associated PCB components, thereby reducing both current consumption and PCB footprint while maintaining voltage shifting capability across the isolation barrier.
Solution Approach 2:
The patent extracts the voltage shifting and driver functions from external high-side driver ICs and integrates them directly into the GaN power device itself. This extraction eliminates the need for external components, reducing current consumption and PCB footprint while maintaining the essential voltage shifting capability.
3Adaptability or versatility
If additional high-side driver ICs are used, then PWM signal transmission is enabled, but device complexity and cost increase
Solution Approach 1:
The patent merges pulse detection, state storage, driver circuitry, and power switching into a single integrated GaN device. This consolidation maintains PWM signal transmission capability while eliminating external high-side driver ICs and associated components, thereby reducing circuit complexity and component count.
Solution Approach 2:
The integrated GaN device provides universal functionality by combining pulse detection, state storage, driver amplification, and power switching in one component. This multi-functionality maintains PWM signal transmission capability while eliminating the need for separate external driver ICs, reducing overall system complexity and cost.
Data Source
AI summary
A power drive circuit is disclosed. The power circuit includes: a pulse detector, configured to generate first and second control signals in response to first and second pulse signals, respectively. The power drive circuit also includes a state storage device, configured to generate first and second driver input signals in response to the first and second control signals, respectively. The power drive circuit also includes a driver configured to generate first and second gate drive signals in response to the first and second driver input signals, respectively. The power drive circuit also includes a power switch, configured to receive the first and second gate drive signals, where the first and second gate drive signals control the power switch to selectively conduct or not conduct current between first and second terminals.