Pulse-Edge Data Transmission Circuits Without ADC/DAC Bottlenecks
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Solution Overview
Problem
Existing digital data modulation methods such as NRZ and PAM require analog-to-digital converters (ADC) and digital-to-analog converters (DAC) with high power consumption, which is inefficient and limits data transmission speed.
Innovation Solution
A data transmission and reception circuit system that utilizes the rising and falling edges of pulse signals to encode and decode data, eliminating the need for ADC and DAC by using time levels to represent digital data, allowing for high-speed data transmission without the need for analog converters.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If NRZ or PAM modulation methods are used, then data transmission can be performed, but high power consumption is required due to the need for ADC and DAC
Solution Approach 1:
The patent extracts and eliminates the ADC and DAC components from the data transmission system. By using time-level encoding where data is represented by the timing of pulse edges rather than amplitude levels, the system removes the need for analog-to-digital and digital-to-analog conversion, thereby eliminating the high power consumption associated with these converters while maintaining data transmission capability
Solution Approach 2:
The patent changes the fundamental parameter used for data encoding from amplitude (voltage level) to time (edge timing). Instead of using different voltage levels to represent data bits as in NRZ and PAM, the system uses the timing position of rising and falling edges relative to a clock signal, fundamentally altering how information is encoded and transmitted
2Productivity
If ADC and DAC are used for modulation and demodulation, then data transmission is enabled, but the system complexity increases
Solution Approach 1:
The patent removes the complex ADC and DAC subsystems from the transmission system. By using time-level encoding with digital delay elements controlled by digital signals, the system achieves data modulation and demodulation through simpler digital logic circuits, significantly reducing overall system complexity while maintaining full data transmission functionality
Solution Approach 2:
The patent replaces the analog signal processing mechanism (ADC/DAC conversion) with a digital timing-based mechanism. Instead of converting between analog and digital domains, the system uses digital delay elements and edge detection circuits that operate entirely in the digital domain, substituting complex analog conversion machinery with simpler digital timing control
3Measurement precision
If conventional modulation methods are used, then data can be transmitted, but resolution encoding/decoding is difficult at low operating voltages
Solution Approach 1:
The patent changes the encoding parameter from amplitude to time, which fundamentally improves resolution at low voltages. Since time-level encoding relies on the timing of edge transitions rather than voltage magnitude, the system can achieve high encoding resolution even when operating voltage is reduced, as the timing precision is not directly limited by voltage level
Solution Approach 2:
The patent uses the clock signal itself as a reference for measuring time levels. The rising and falling edges of data pulses are measured relative to the clock signal edges, allowing the system to self-reference and achieve precise encoding/decoding without requiring external high-precision voltage references or complex calibration circuits
Data Source
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AI summary
Provided are a data transmission circuit system and a data reception circuit system, which use an edge of a pulse signal. The data transmission circuit system modulates a digital signal by using time levels determined based on time differences between rising edges and falling edges of a clock pulse signal, and rising edges and falling edges of a data pulse signal. The data reception circuit system demodulates a digital signal by using time levels determined based on time differences between rising edges and falling edges of a recovered clock pulse signal, and rising edges and falling edges of a data pulse signal.