Pulse-Edge Data Transmission Circuit for Low-Power High-Resolution Encoding
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing digital data modulation methods such as NRZ and PAM require analog-to-digital converters (ADC) and digital-to-analog converters (DAC) with high power consumption, which is inefficient and limits encoding resolution at low operating voltages.
Innovation Solution
A data transmission and reception circuit system that uses the edge of a pulse signal to modulate and demodulate data by time levels, eliminating the need for ADC and DAC, and achieving high-resolution encoding even at low voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If NRZ or PAM modulation methods are used, then data can be transmitted using amplitude levels, but high power consumption is required due to ADC and DAC
Solution Approach 1:
The patent changes the modulation parameter from amplitude (voltage levels) to time (edge positions). By representing data through the timing of rising or falling edges relative to a clock signal, the system eliminates the need for high-power ADC and DAC components while maintaining reliable data transmission. This parameter transformation directly resolves the contradiction between power consumption and transmission reliability.
2Measurement precision
If ADC and DAC are used for amplitude modulation, then data encoding can be achieved, but encoding resolution is limited at low operating voltages
Solution Approach 1:
The invention transforms the encoding mechanism from amplitude-based to time-based. By using the temporal position of signal edges within a clock cycle to represent data values, the system achieves high encoding resolution without requiring high operating voltages. This approach maintains precision while reducing power consumption, as timing detection does not depend on voltage amplitude.
3Ease of manufacture
If amplitude levels are used for data encoding, then modulation can be performed, but high power consumption components are required
Solution Approach 1:
The patent replaces amplitude modulation with time modulation, where data is encoded in the temporal position of signal edges. This simplifies the circuit architecture by eliminating complex amplitude conversion components (ADC/DAC) and using only timing-based logic circuits, thereby reducing both manufacturing complexity and power consumption simultaneously.
4Use of energy by moving object
If time levels are used for data transmission, then power consumption is reduced, but inter-symbol interference must be managed
Solution Approach 1:
The patent incorporates feedback mechanisms in the receiver to detect and correct timing deviations caused by inter-symbol interference. By continuously monitoring the received signal timing and adjusting the clock synchronization accordingly, the system maintains accurate data recovery despite the presence of ISI, thus enabling low-power time-based modulation to overcome the harmful effects of inter-symbol interference.
Data Source
Figure 1A
Figure 1B
Figure 2A
AI summary
Provided are a data transmission circuit system and a data reception circuit system, which use an edge of a pulse signal. The data transmission circuit system modulates a digital signal by using time levels determined by time differences between rising edges (or falling edges) of a clock pulse signal and rising edges (or falling edges) of a data pulse signal. The data reception circuit system demodulates a digital signal by using time levels determined by time differences between rising edges (or falling edges) of a recovered clock pulse signal and rising edges (or falling edges) of a data pulse signal.