Pulse-Edge Data Transmission Circuit Without ADC/DAC Modulation

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Solution Overview

Problem

Existing digital data modulation methods such as NRZ and PAM require high power consumption due to the use of analog-to-digital and digital-to-analog converters for amplitude modulation and demodulation.

Innovation Solution

A data transmission and reception circuit system utilizing the rising and falling edges of a pulse signal to encode and decode data, eliminating the need for analog-to-digital and digital-to-analog converters by employing time levels for data transmission and reception.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If NRZ or PAM modulation methods are used with ADC and DAC, then data transmission can be achieved, but power consumption is high

Engineering Contradiction:
Improvepower consumptionVSAvoiddata transmission speed
Core Design Contradiction:
Use of energy by moving objectVSProductivity

Solution Approach 1:

The patent extracts and eliminates the ADC and DAC components from the data transmission system. By using time-level encoding directly in the digital domain, the system removes the power-hungry analog conversion stages while maintaining data transmission capability through pulse position modulation based on rising and falling edges.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent substitutes the analog signal processing mechanism (ADC/DAC) with a digital time-level encoding mechanism. Instead of converting digital signals to analog and back, the system uses digital circuits to generate and detect time-level encoded pulses, replacing the mechanical/electrical conversion process with a purely digital timing-based approach.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Ease of manufacture

If ADC and DAC are used for pulse amplitude modulation, then data encoding is achieved, but the system requires high power consumption components

Engineering Contradiction:
Improvesystem complexityVSAvoidpower consumption
Core Design Contradiction:
Ease of manufactureVSUse of energy by moving object

Solution Approach 1:

The patent extracts and eliminates the ADC and DAC components from the data transmission system. By using time-level encoding directly in the digital domain, the system removes the power-hungry analog conversion stages while maintaining data transmission capability through pulse position modulation based on rising and falling edges.

Inventive Principle:
Principle #2Taking out (Extraction)

3Measurement precision

If traditional modulation methods are used, then data transmission is possible, but encoding resolution is limited at low operating voltages

Engineering Contradiction:
Improveencoding resolutionVSAvoidoperating voltage
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent changes the encoding parameter from amplitude (voltage level) to time (pulse position). By encoding data in the temporal position of rising and falling edges rather than in voltage amplitude, the system achieves high encoding resolution that is independent of operating voltage, enabling precise data representation even at low voltages where traditional amplitude-based modulation fails.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12620982B2Data transmission circuit system and data reception circuit system using rising edge and falling edge of pulse signal
Publication Date: 2026.05.05 KONKUK UNIV IND COOP CORP
  • US12620982B2 patent drawing
  • US12620982B2 patent drawing
  • US12620982B2 patent drawing

AI summary

Provided are a data transmission circuit system and a data reception circuit system, which use an edge of a pulse signal. The data transmission circuit system modulates a digital signal by using time levels determined based on time differences between rising edges and falling edges of a clock pulse signal, and rising edges and falling edges of a data pulse signal. The data reception circuit system demodulates a digital signal by using time levels determined based on time differences between rising edges and falling edges of a recovered clock pulse signal, and rising edges and falling edges of a data pulse signal.