Pulse Edge Detection Circuit for Noisy High-Speed Signals

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Solution Overview

Problem

Existing edge detection circuits face challenges in accurately detecting the short edge intervals of high-speed pulse signals in noisy environments, such as those encountered in motor drive systems, due to the difficulty in implementing high-speed clock signals and large circuit area requirements.

Innovation Solution

A pulse edge detection circuit is configured with first and second edge detection units that output signals at specific timings, using a synchronization clock signal to represent edge generation timing, allowing for detection of edges without a high-speed clock signal, and includes a delay circuit to manage reset timing and reduce noise interference.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a high-speed clock signal is used to detect edge intervals of high-speed pulse signals, then measurement precision is improved, but device complexity increases and circuit area expands

Engineering Contradiction:
Improveedge interval detection precisionVSAvoidcircuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The circuit divides edge detection into two separate detection units: a first edge detection unit that detects the first edge of the pulse signal, and a second edge detection unit that detects the second edge. Each unit operates independently with its own timing control, avoiding the need for a single high-speed clock signal to handle both edges simultaneously. This segmentation allows each unit to use lower-speed clock signals while maintaining accurate edge interval measurement.

Inventive Principle:
Principle #1Segmentation

2Measurement precision

If a high-speed clock signal is used to detect edge intervals, then measurement precision is improved, but the circuit area increases

Engineering Contradiction:
Improveedge interval detection precisionVSAvoidcircuit area
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

By segmenting the detection function into two separate units with independent timing controls, the circuit avoids requiring a high-speed clock signal generator and associated high-speed logic circuits that would occupy large area. Each detection unit can be implemented with standard-speed components, reducing overall circuit footprint while maintaining measurement accuracy.

Inventive Principle:
Principle #1Segmentation

3Measurement precision

If conventional edge detection methods are used in noisy environments, then detection capability is maintained, but reliability decreases due to noise interference

Engineering Contradiction:
Improveedge detection capabilityVSAvoiddetection reliability in noisy environment
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The first edge detection unit detects the first edge and generates a first clock signal that is used to control the timing of the second edge detection unit. This preliminary detection and timing setup allows the second edge to be detected at the precise moment it occurs, even in the presence of noise. The pre-established timing reference ensures that noise does not cause false detections or missed detections.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The output of the first edge detection unit (the first clock signal) is fed back to control the second edge detection unit's timing. This feedback mechanism ensures that the second edge detection is synchronized with the actual pulse signal timing, improving reliability by adapting to real signal conditions rather than relying on fixed high-speed clock cycles that may be susceptible to noise interference.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS12135345B2Pulse edge detection circuit
Publication Date: 2024.11.05 DENSO CORP
  • US12135345B2 patent drawing
  • US12135345B2 patent drawing
  • US12135345B2 patent drawing

AI summary

In a pulse edge detection circuit, a measurement circuit has a comparator provided therein which compares a voltage with a reference voltage and outputs a pulse signal. An RSFF puts a signal in a high level at a timing at which detecting a rise edge due to a change of the pulse signal to the high level. In such manner, a set signal of an RSFF becomes inactive and a reset signal of the RSFF becomes active, and a fall edge of the pulse signal becomes detectable. When a fall edge is generated due to a change of the pulse signal from the high level to the low level, the set signal of the RSFF becomes active, and a signal becomes high level.